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Mixed-Signal Modeling/Verification Engineer

Apple

San Diego (CA)

On-site

USD 166,000 - 297,000

Full time

30+ days ago

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Job summary

An established industry player is seeking a Mixed-Signal Modeling/Verification Engineer to join their innovative team in San Diego. This role involves developing and verifying analog behavioral models for cutting-edge Analog/RF circuits using SystemVerilog. You will collaborate with talented engineers, ensuring high-quality designs that push the boundaries of technology. The ideal candidate will have extensive experience in Mixed-Signal Verification and a passion for engineering excellence. This opportunity offers a dynamic work environment where creativity and collaboration thrive, contributing to the development of the next generation of revolutionary products.

Benefits

Comprehensive medical coverage
Dental coverage
Retirement benefits
Employee stock purchase plan
Educational reimbursement
Discretionary bonuses
Relocation assistance

Qualifications

  • 10+ years of experience in Mixed-Signal Verification and Real Numbered Modeling.
  • Strong knowledge of analog circuit design and basic analog devices.

Responsibilities

  • Develop and verify behavioral models for Analog/RF blocks using SystemVerilog.
  • Collaborate with design teams to define and execute validation plans.

Skills

Mixed-Signal Verification
SystemVerilog
Analog Circuit Design
Script Writing (Perl, Python)
Signal Processing

Education

Bachelor's Degree
Master's Degree
Ph.D.

Tools

MATLAB
SystemC
C/C++

Job description

Mixed-Signal Modeling/Verification Engineer

San Diego, California, United States Hardware

Summary

Posted: Jan 17, 2025

Role Number: 200587161

Imagine what you could do here at Apple! Together, we could help craft the next generation of the world’s finest devices. New ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your career, and there's no telling what you could accomplish. Apple’s growing wireless silicon development team is seeking an exceptional candidate for its modeling and verification team. In this role, you will be modeling and verifying Analog/RF/Mixed-Signal blocks and SOCs using SystemVerilog to create behavioral models, testbenches, checkers, and tests. You will build and execute test plans to meet project schedules and quality requirements. You will become part of a hands-on development team that fosters engineering excellence, creativity, and innovation. Collaboration across teams is a key component of success at Apple. The right candidate will thrive in that type of environment. It's one of the most exciting aspects of the job. Dynamic, smart people and inspiring, innovative technologies are the norm here. Will you help us design the next generation of revolutionary Apple products?

Description

In this role, core responsibilities include, but are not limited to the following:

  1. Develop accurate and simulation-efficient analog behavioral models for Analog/RF blocks in SystemVerilog.
  2. Build and reuse real-numbered analog behavioral models of the Analog and Mixed-Signal Circuits.
  3. Verify that the behavioral models are accurate representations of corresponding analog circuits.
  4. Review specifications and collaborate with the design team to extract features, define, and execute models’ development/validation plans.
  5. Build and reuse monitors and checkers for RF, Mixed-Signal, and Digital blocks.
  6. Debug failures, fix testbench/model/checker issues, manage bug tracking, etc.
  7. Write scripts for automation of the flow and improve Mixed-Signal verification methodology.
  8. Develop top/block-level Mixed-Signal and Digital testbenches and generate directed/constrained random tests in a UVM framework.

Minimum Qualifications

  1. BS with 10+ years of relevant industrial experience.
  2. Hands-on experience in Mixed-Signal Verification and Real Numbered Modeling of Mixed-Signal Systems.
  3. Analog circuit design knowledge and a good understanding of basic analog devices.

Preferred Qualifications

  1. Master’s or Ph.D. with 5+ years of experience in modeling and verification of analog/RF circuits.
  2. Modeling experience for RF/Mixed-Signal blocks with real-number models in SystemVerilog or a similar HDL.
  3. In-depth understanding of SystemVerilog, real number models, user-defined nettypes, and Verilog-AMS.
  4. Deep understanding of AMS and RF blocks like filters, ADC, DAC, VCO, A/D/PLL, Serdes, LNA, Mixer, etc.
  5. Experience in transistor-level Spice simulations.
  6. Experience in writing scripts in languages such as Perl or Python.
  7. Knowledge of signal processing using Python or MATLAB.
  8. Experience in modeling with SystemC and/or C/C++.

Pay & Benefits

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $166,600 and $296,300, and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation.

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.

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