Analog/Mixed-Signal Design Verification Methodology Development Engineer

MediaTek; San Diego (CA); On-site; USD 180,000 - 260,000; Full time

Job summary

Join a forward-thinking company as an Analog/Mixed-Signal Design Verification Engineer, where you'll enhance and streamline verification methodologies for cutting-edge silicon products. This role involves collaborating with diverse teams to develop efficient verification flows for complex systems, ensuring high quality and efficiency in pre-silicon verification. With a focus on innovation and quality, you'll be part of a dynamic team committed to pushing the boundaries of technology. If you have a passion for design verification and a desire to contribute to impactful projects, this opportunity is perfect for you!

Benefits

Comprehensive Health Insurance

Life and Disability Insurance

Savings Plan

Paid Time Off (PTO)

Parental Leave

401K

Company Paid Holidays

Qualifications

• 5+ years of ASIC functional verification experience, preferably with analog mixed signal cores.
• Proficient in UVM, Verilog, System Verilog, and SVA.

Responsibilities

• Establish and enhance AMS DV related development methods and processes.
• Develop efficient Subsystem and SoC Level verification flows.

Skills

Critical Thinking

Problem-Solving

ASIC Design Process

Digital Design

UVM-based Design Verification

Verilog

System Verilog

System Verilog Assertions (SVA)

Test Bench Development

Unix/Linux Shell Programming

Education

BS Degree

MS Degree

Tools

C

C++

SystemC

Perl

Python

CVS

Perforce

Job description

Analog/Mixed-Signal Design Verification Methodology Development Engineer

Analog/Mixed-Signal Design Verification Methodology Development Engineer

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The candidate will work in Analog/Mixed-Signal Design Verification Methodology Development group to establish, streamline and enhance new and existing AMS DV related development method, coding process and integration flows, and work hands-on with AMS IP Teams for AMS DV flow and process experiments, demonstrations, adaptions, and deployment. The candidate will work with digital design, analog design, analog behavioral modeling and design verification teams, apply and advance existing and evolving Digital and AMS Verification methodologies and processes, and contribute to establish and maintain Verification Platform to ensure High Quality and High Efficiency of Pre-Si Verification Delivery towards high quality silicon products.

Skills/Experience

• Quick learner with strong critical thinking and creative problem-solving skills.
• Solid knowledge in ASIC design process, computer architecture, digital design and UVM-based design verification methodologies.
• Proficient on using design and verification languages: UVM, Verilog, System Verilog, and System Verilog Assertions (SVA).
• Proficient on Design Verification tools and techniques, including test bench development, simulation, debugging and coverage closure, etc.
• Proficient on Design Verification development process, from specification to test plan, to configurable test bench, drivers and checkers setup, to test suite building to meet functional and code coverage goals, and power-aware simulations and gate level simulations.
• 5+ years ASIC functional verification hands-on work experience, preferably with some verification experience on analog mixed signal cores and/or chips.
• Design and/or Verification work experience on System with High Speed Interface, such as USB, PCIe, HBM, or DDR DRAM Interface, is a big plus.
• Familiar with programming languages: C, C++, and/or SystemC.
• Scripting and automation skills: Unix/Linux shell programming, Perl, Python, Makefile, and revision management (e.g., CVS, Perforce, etc.) is a plus.
• Knowledge of Analog Mixed-Signal Design Fundamentals and analog behavioral modeling is a plus
• Design or Verification work experience on Wireless and/or Wired Interface Standards, such as WiFi and SERDES, etc., is a plus.

Responsibilities

• Work in methodology development team to establish, streamline and enhance new and existing AMS DV related development method, coding process and integration flows.
• Focus of work is to develop efficient Subsystem and SoC Level verification flow involving sophisticated Multiple Digital and Analog Cores, including SERDES PHYs, Controllers for PHYs with configurability, Analog Sensors, Power Management IPs, etc., covering large-scale Inter-Operability testing, customer-oriented Real World use model testing, etc.
• Apply wide range of Digital and/or AMS DV skills to help and support AMS IP or Chip DV Teams to establish or enhance new or existing DV capabilities, including but not limited to developing scalable and portable verification environment and components efficiently applicable to IP, Subsystem and SoC Levels.
• Contribute to continuous improving on AMS DV process for better quality and efficiency through methodology and process improvements.
• Communicate and collaborate with global architecture, design, verification, and post-Silicon testing teams to address new needs or requirement on DV Support.

Education Requirements

• BS degree and a minimum of 10 years of relevant industry experience, or
• MS degree with a minimum of 7 years of relevant industry experience
• Senior positions to be offered to candidates with proven expertise in the relevant field

Salary range: $180,000- $260,000

Employee may be eligible for performance bonus, short and long term incentive programs. Actual total compensation will be dependent upon the individual's skills, experience and qualifications. In addition, MediaTek provides a variety of benefits including comprehensive health insurance coverage, life and disability insurance, savings plan, Company paid holidays, Paid time off (PTO), Parental leave, 401K and more.

MediaTek is an Equal Opportunity Employer that is committed to inclusion and diversity to all, regardless of age, ancestry, color, disability (mental and physical), exercising the right to family care and medical leave, gender, gender expression, gender identity, genetic information, marital status, medical condition, military or veteran status, national origin, political affiliation, race, religious creed, sex (includes pregnancy, childbirth, breastfeeding and related medical conditions), and sexual orientation.

Seniority level

• Seniority level

  Mid-Senior level

Employment type

• Employment type

  Full-time

Job function

• Industries

  Semiconductor Manufacturing

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