New College Grad - Mixed Signal Design Engineer, HBM

1000 Micron Technology, Inc.

Richardson (TX)

On-site

USD 120,000 - 150,000

Full time

14 days+

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Benefits offered by this job

Medical, dental, and vision plans
Income protection programs
Paid family leave
Paid time-off
Paid holidays

Job summary

1000 Micron Technology, Inc. is seeking a talented engineer with expertise in micro-architecture and digital design for their Richardson, Texas location. The role involves defining subsystem architecture, implementing RTL designs in SystemVerilog, and collaborating across teams to ensure successful product development.

The ideal candidate will have over 10 years of experience in SoC integration and expertise in timing and low-power design concepts. Micron offers a robust benefits package including medical, dental, and vision plans.

Qualifications

  • 10+ years of experience in digital design or SoC integration.
  • Expert in SystemVerilog, clock and reset architecture, CDC and RDC methodologies.
  • Working knowledge of design-for-debug and design-for-test fundamentals.

Responsibilities

  • Define and own micro‑architecture for subsystems.
  • Implement and integrate RTL designs in SystemVerilog.
  • Collaborate with DV teams to build verification plans.

Skills

SystemVerilog RTL design
Digital design
SoC integration
Low-power design concepts
Debug coordination

Education

Bachelor’s degree in Electrical Engineering or Computer Engineering

Job description

Responsibilities
  • Define and own micro‑architecture for base‑die digital subsystems, including high‑bandwidth memory (HBM) channel support logic, boot and initialization sequencing, training orchestration, configuration and status registers (CSR), telemetry, performance counters, and reliability features.
  • Translate system requirements into timing, power, and area budgets by partnering with physical layer (PHY) and system architects, and maintain clear interface specifications for bus protocols, clock‑domain crossing (CDC), and reset strategy.
  • Implement and integrate synthesizable register‑transfer level (RTL) designs in SystemVerilog, including multi‑channel logic, interrupts, events, register maps, scan hooks, and design‑for‑test (DFT) interfaces.
  • Ensure robust reset and power‑up behavior, handle corner cases, and maintain clear engineering change order (ECO) pathways.
  • Collaborate with design verification (DV) teams to build verification plans, achieve coverage goals, complete CDC and reset‑domain crossing (RDC) checks, and debug RTL, testbench, and gate‑level issues.
  • Provide guidance on timing constraints, exceptions, and path intent, and refine micro‑architecture to resolve timing‑critical paths.
  • Partner with DFT and test teams to integrate scan, memory built‑in self‑test (MBIST), logic built‑in self‑test (LBIST), boundary access, and debug instrumentation.
  • Support post‑silicon validation by enabling debug hooks, correlating issues to RTL or architecture, and driving efficient issue resolution.
Minimum Qualifications
  • Bachelor’s degree in Electrical Engineering or Computer Engineering, or equivalent practical experience.
  • Typically 10+ years of experience in digital design or system‑on‑chip (SoC) integration with ownership of complex logic through tape‑out.
  • Expertise in SystemVerilog RTL design, clock and reset architecture, clock‑domain crossing (CDC) and reset‑domain crossing (RDC) methodologies, and low‑power design concepts.
  • Working knowledge of design‑for‑debug and design‑for‑test fundamentals and experience coordinating multi‑functional technical efforts.
Preferred Qualifications
  • Experience supporting post‑silicon validation through structured debug correlation and issue resolution.
  • Experience integrating scan, memory built‑in self‑test (MBIST), logic built‑in self‑test (LBIST), or related test and debug features.
  • Experience developing verification plans and partnering with design verification teams to achieve coverage goals.
  • Ability to refine micro‑architecture to improve timing and mentor others on constraints and design tradeoffs.
Benefits

Micron offers a comprehensive benefits package that includes medical, dental, and vision plans; income protection programs; paid family leave; paid time‑off; paid holidays; and access to a detailed Benefits Guide at micron.com/careers/benefits.

Equal Opportunity Employer

Micron is an equal‑opportunity workplace and an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

Micron prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.

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