Mixed Signal ASIC Engineer

Acceler8; Massachusetts; On-site; USD 160,000 - 200,000; Full time

Job summary

Acceler8 Talent in Boston is seeking a Mixed Signal ASIC Engineer to take analog/mixed-signal designs from architecture through layout, tape-out and measured silicon for photonic AI processors.

The role involves ADCs/DACs/TIAs and amplifier circuits, schematic/layout/verification, silicon bring-up, and electronic-photonic co-design with PCB/FPGA interfaces, all on-site in Boston.

Candidates should have strong fundamentals and Cadence or Synopsys experience, with exposure to 65nm–22nm tech nodes.

Qualifications

• Strong analog/mixed-signal circuit fundamentals.
• Personal ownership of fabricated and tested silicon.
• Experience across design, layout, bring-up and measurement.
• Cadence or Synopsys experience.
• Exposure to SAR ADCs, DACs, TIAs, sensor/readout or array circuits.
• Experience around 65nm–16nm, with 22nm especially relevant.

Responsibilities

• Take analog and mixed-signal designs from architecture through layout, tape-out and measured silicon.
• Schematic, layout, verification and foundry tape-out.
• Silicon bring-up and bench characterization.
• Electronic-photonic co-design and packaging.
• PCB/FPGA interfaces supporting chip test.

Skills

Analog/mixed-signal fundamentals

Silicon bring-up

Design, layout, bring-up and measure

Cadence or Synopsys

SAR ADCs, DACs, TIAs, readout

65nm

22nm

Tools

Cadence

Synopsys

Job description

Mixed Signal ASIC Engineer | Photonic AI | Boston

Want to build the electronic circuits that make photonic AI processors actually work?

I’m working with an early-stage semiconductor company developingphotonic AI processors, pairing a monolithicInP photonics platformwith electronic ASICs that control and read out the optical circuits.

They’re hiring aMixed Signal ASIC Engineerto take analog and mixed-signal designs from architecture throughlayout, tape-out and measured silicon.

Work across:

• ADCs, DACs, TIAs and amplifier circuits
• Schematic, layout, verification and foundry tape-out
• Silicon bring-up and bench characterization
• Electronic-photonic co-design and packaging
• PCB/FPGA interfaces supporting chip test

What the team are ideally looking for:

• Stronganalog/mixed-signal circuit fundamentals
• Personal ownership offabricated and tested silicon
• Experience acrossdesign, layout, bring-up and measurement
• StrongCadence or Synopsysexperience
• Exposure toSAR ADCs, DACs, TIAs, sensor/readout or array circuitsis particularly valuable
• Experience around65nm–16nm, with22nmespecially relevant
• Boston, MA | Onsite
• From around $160K–$200K