Memory Performance Engineer, Platform Architecture

Apple Inc.; Cupertino (CA); On-site; USD 143,000 - 265,000; Full time

Job summary

Join a forward-thinking company as a Memory Performance Engineer, where you will develop cutting-edge SoC-level solutions that enhance the performance and efficiency of innovative products. Your role will involve collaborating with cross-functional teams to model performance, analyze data, and contribute to the architecture of future technologies. With a focus on memory controller techniques and performance modeling, you will play a crucial part in shaping the future of tech. This dynamic position offers a competitive salary and comprehensive benefits, making it an exciting opportunity for those passionate about technology and innovation.

Benefits

Medical insurance

Dental insurance

Retirement plans

Stock options

Educational reimbursement

Qualifications

• Knowledge of memory controller techniques for DDRx and LPDDRx technologies.
• 3+ years of relevant experience in SoC design projects.

Responsibilities

• Develop SoC-level solutions for optimal performance and power efficiency.
• Collaborate with hardware and software teams on architectural proposals.

Skills

C++ performance modeling

Memory controller techniques

Understanding of memory access patterns

Performance modeling and microarchitecture studies

Proficiency with revision control systems

Education

MS in Computer Science

PhD in Electrical Engineering

Tools

GIT

Job description

Memory Performance Engineer, Platform Architecture

Cupertino, California, United States | Hardware

Description

You will be responsible for developing SoC-level solutions that shape the architecture of Apple's future System-on-Chips. Your work will be crucial in delivering optimal performance and power efficiency for Apple’s products. Collaborating with hardware and software teams, your duties include:

1. C++ performance modeling of architectural proposals
2. Writing architectural specifications with multidisciplinary teams
3. Analyzing measured and simulated data to compare design options
4. Developing architectural solutions with cross-functional teams
5. Enhancing Apple's modeling platform through API and tool development
6. Presenting data-driven analysis to inform architecture and design decisions
7. Measuring and analyzing existing SoC workloads
8. Occasional international travel

Minimum Qualifications

• Knowledge of memory controller techniques for DDRx and LPDDRx technologies
• Understanding of memory access patterns in CPU, GPU, Camera/Video, or Machine Learning accelerators and cache usage

Preferred Qualifications

• MS or PhD in CS, EE, or related fields
• 3+ years of relevant experience
• Knowledge of QoS solutions for SoCs
• Experience in performance modeling and microarchitecture studies
• Contributed to SoC design projects at micro-architectural or RTL levels
• Proficiency with revision control systems like GIT

Compensation and Benefits

The base salary range for this role is $143,100 to $264,200, depending on skills and experience. Apple offers comprehensive benefits, including medical, dental, retirement plans, stock options, educational reimbursement, and more. Eligibility for bonuses, stock programs, and relocation varies by role and location.

Equal Opportunity Statement

Apple is committed to diversity and inclusion, providing equal employment opportunities regardless of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or other protected characteristics.