Manufacturing Operations Leader

Jobtailor; Austin (TX); On-site; USD 150,000 - 190,000; Full time

Job summary

Jobtailor is seeking an experienced manufacturing leader to oversee semiconductor FAB operations, including wafer start planning, 24/7 staffing, and material flow. The role requires deep domain knowledge in advanced packaging and back-end semiconductor processes, with a focus on cycle time, yield, and inventory control.

The ideal candidate will drive Lean, Six Sigma, and SPC initiatives, ensure cleanroom discipline, and manage high-mix, high-volume, time-critical environments while maintaining

Qualifications

• Ten years in semiconductor FAB or advanced packaging manufacturing.
• Five years leading 24/7 manufacturing or operations teams.
• Direct experience managing wafer lot starts and WIP control, cleanroom and gown room operations, and FAB material flow and logistics.
• Strong background in advanced packaging or back-end semiconductor operations.
• Deep understanding of FAB manufacturing flows and constraints, wafer lot control, dispatch rules, and MES logic, and advanced packaging integration steps.
• Working knowledge of AMHS and wafer handling systems, spares, BOMs, and preventive maintenance strategies, inventory control systems, and ERP integration.
• Expertise in SPC and yield management, OEE, MTBF, MTTR, and cycle time analysis, ESD, contamination control, and cleanroom standards.
• Strong execution-focused leadership with operational rigor.
• Ability to manage high-mix, high-volume, and time-critical environments.
• Financial acumen for inventory, cost, and capacity optimization.
• Relevant education and experience may be substituted as appropriate.

Responsibilities

• Manage master wafer start plan and daily execution cadence, balance demand, capacity, engineering work, and maintenance windows, achieve committed output, cycle time, and on-time delivery metrics.
• Ensure shift staffing alignment with wafer start and production loads, guarantee gown room readiness for all shifts and contingency scenarios, and train and enforce cleanroom discipline and standard work.
• Ensure seamless lot movement with zero wafer loss or misprocessing, drive AMHS reliability and manual transport discipline, and minimize wafer handling defects and contamination risks.
• Ensure spares availability to meet tool uptime and production targets, drive cost discipline through optimized inventory management, and maintain accurate and audit-ready inventory logs and traceability.
• Lead Lean, Six Sigma, and SPC initiatives focused on cycle time reduction, lot start predictability, and inventory optimization; apply structured root‑cause analysis (8D, FMEA) to recurring FAB issues.

Job description

Responsibilities

• Manage master wafer start plan and daily execution cadence, balance demand, capacity, engineering work, and maintenance windows, achieve committed output, cycle time, and on‑time delivery metrics.
• Ensure shift staffing alignment with wafer start and production loads, guarantee gown room readiness for all shifts and contingency scenarios, and train and enforce cleanroom discipline and standard work.
• Ensure seamless lot movement with zero wafer loss or misprocessing, drive AMHS reliability and manual transport discipline, and minimize wafer handling defects and contamination risks.
• Ensure spares availability to meet tool uptime and production targets, drive cost discipline through optimized inventory management, and maintain accurate and audit‑ready inventory logs and traceability.
• Lead Lean, Six Sigma, and SPC initiatives focused on cycle time reduction, lot start predictability, and inventory optimization; apply structured root‑cause analysis (8D, FMEA) to recurring FAB issues.

Requirements

• Ten years in semiconductor FAB or advanced packaging manufacturing.
• Five years leading 24/7 manufacturing or operations teams.
• Direct experience managing wafer lot starts and WIP control, cleanroom and gown room operations, and FAB material flow and logistics.
• Strong background in advanced packaging or back‑end semiconductor operations.
• Deep understanding of FAB manufacturing flows and constraints, wafer lot control, dispatch rules, and MES logic, and advanced packaging integration steps.
• Working knowledge of AMHS and wafer handling systems, spares, BOMs, and preventive maintenance strategies, inventory control systems, and ERP integration.
• Expertise in SPC and yield management, OEE, MTBF, MTTR, and cycle time analysis, ESD, contamination control, and cleanroom standards.
• Strong execution‑focused leadership with operational rigor.
• Ability to manage high‑mix, high‑volume, and time‑critical environments.
• Financial acumen for inventory, cost, and capacity optimization.
• Relevant education and experience may be substituted as appropriate.

Hard Skills

• wafer lot starts
• WIP control
• cleanroom operations
• gown room operations
• FAB material flow
• Lean
• Six Sigma
• SPC
• root cause analysis
• cycle time analysis

Soft Skills

• execution‑focused leadership
• operational rigor
• ability to manage high‑mix environments
• ability to manage high‑volume environments
• financial acumen