Machine Learning Engineer

D24 Search Limited; Santa Barbara (CA); On-site; USD 150,000 - 230,000; Full time

Job summary

D24 Search Limited, based in Santa Barbara, CA, is seeking a Machine Learning Engineer to advance post-training, fine-tuning, and evaluation of large language models for chip design and verification. You will take ideas from experiments to production, impacting AI agents used by leading semiconductor companies.

You will work with researchers and EDA experts to build robust data pipelines and evaluation tools, shaping model quality and reliability across RTL and hardware workflows.

Qualifications

• End-to-end model training experience including data collection, post-training, and evaluation.
• Degree in EE/CE/CS with ML focus.
• Experience with ML on hardware modalities or EDA (Netlists, RTL, Verilog, surrogate modeling, graph neural networks).
• 2–10 years as ML engineer or PhD with AI/ML emphasis.
• ML for EDA experience in academia or industry (Synopsys, Cadence, Keysight, Siemens, Apple, etc).
• Published papers at top-tier EDA or ML conferences.
• Experience building evaluation harnesses and data pipelines for large-scale training.
• Experience training, fine-tuning, or post-training large language models (SFT, RLHF).

Responsibilities

• Train, fine-tune, and post-train LLMs for chip design and verification tasks.
• Build and maintain data pipelines for training, including data collection, cleaning, and synthetic data generation.
• Design evaluation frameworks and benchmarks for model accuracy, reliability, and agent performance.
• Run experiments, analyze results, and iterate to improve model quality.
• Collaborate with research scientists, systems engineers, and EDA experts to productionize models.
• Keep up with emerging research and open-source work and apply it to our models.

Skills

End-to-end model training

Data pipeline development

Model evaluation frameworks

Experimentation and iteration

Collaboration with researchers

Academic research publication

SFT RLHF for LLMs

Education

B.S./M.S./PhD in EE/CE/CS with ML focus

Tools

C++

CUDA

GPU architectures

SGLang

vLLM

Model deployment tooling

Job description

My client is a well funded AI – Driven EDA start up revolutionizing the chip design and verification process with agentic AI tools tailored for the semiconductor industry.Thier flagship , leverages advanced AI agents to streamline and enhance the design, debugging, and verification of RTL (Register Transfer Level) code, accelerating time-to-market for chip developers.

We are committed to empowering hardware design and verification engineers by providing cutting-edge solutions that improve efficiency, scalability, and accuracy in chip development.

Based in Santa Barbara, CA, with 75 FTEs and over $135m in recent funding- we are scaling fast at the forefront of AI innovation in electronic design automation (EDA).

We are seeking a Machine Learning Engineer to improve the models that power our agentic AI platform. You will work on post-training, fine-tuning, and evaluation of large language models for chip design and verification tasks, taking research ideas from experiment to production. Your work will directly impact the quality and reliability of AI agents used by leading semiconductor companies.

Key Responsibilities

• Train, fine-tune, and post-train LLMs for chip design and verification tasks, using techniques such as supervised fine-tuning and reinforcement learning.
• Build and maintain data pipelines for training, including data collection, cleaning, and synthetic data generation.
• Design evaluation frameworks and benchmarks that measure model accuracy, reliability, and agent performance on real engineering workflows.
• Run experiments, analyze results, and iterate quickly to improve model quality.
• Collaborate with research scientists, systems engineers, and EDA experts to bring new models and methods into production.
• Keep up with emerging research and open-source work, and apply promising techniques to our models.

Requirements:

• Expereince with end- to- end model training: including data collection, post- training, and evaluation of model accuracy and reliability.
• B. S. , M. S. , or PhD in Electrical Engineering, Computer Engineering, or Computer Science with a focus on machine learning preferred
• Experience with machine learning on hardware modalities or EDA (Netlists, RTL, Verilog, surrogate modeling, graph neural networks)
• 2 - 10 years of experience as a machine learning engineer or PhD recent graduate with a thesis / emphasis in AI/ML.
• ML for EDA experience in academia or industry (Synopsys, Cadence, Keysight, Siemens, Apple, etc)
• Published papers at top- tier EDA or ML conferences
• Experience building evaluation harnesses and data pipelines for large scale training
• Experience training, fine- tuning, or post- training large language models (SFT, RLHF)

Nice-to-have

• Experience partnering with customers to gather product requirements and productize technical solutions
• Systems and inference level understanding: C++, CUDA, GPU architecture, SGLang or vLLM, model deployment and optimization strategies, etc.

Why Join Us

• Work on cutting-edge LLM post-training and evaluation problems with real-world production impact.
• Working with research scientists, software engineers and EDA veterans (including a former Synopsys VP) on a flat team that rewards good ideas, and helping close the loop between front-end and back-end chip design.
• Access to substantial GPU compute resources for experimentation.
• Shape the quality of AI systems used by leading semiconductor companies.