Low-Latency FPGA Engineer for Quant Trading

Selby Jennings; Chicago (IL); On-site; USD 100,000 - 140,000; Full time

Job summary

Selby Jennings is seeking an FPGA Engineer to join its crown‑jewel trading desk, focusing on FPGA for trading strategies. You will work on FPGA‑based, ultra‑low‑latency systems, contributing to design, verification, and validation in a collaborative environment.

You will develop synthesizable SystemVerilog, build testbenches, run simulations, and create Python automation tools, collaborating with senior engineers through the hardware development lifecycle.

Qualifications

• FPGA design experience across full lifecycle.
• Knowledge of SystemVerilog or Verilog for hardware design and verification.
• Experience with simulation and debugging tools such as ModelSim, Questa, or Vivado Simulator.
• Proficiency with Python for automation, scripting, and data analysis.
• Understanding of digital design fundamentals including synchronous logic, state machines, clock domain crossing, and FIFO architectures.
• Interest in financial technology, quantitative trading, or performance‑critical systems is preferred.

Responsibilities

• Assist in development and maintenance of synthesizable SystemVerilog code for FPGA‑based applications.
• Build and maintain comprehensive testbenches to verify hardware functionality and performance.
• Execute simulations, debug logic issues, and analyze waveform data to ensure design correctness.
• Develop Python‑based automation tools and test scripts to improve validation and verification workflows.
• Support hardware deployments by analyzing real‑time system data to identify design issues, timing concerns, and edge cases.
• Document design implementations, verification results, and testing procedures.
• Collaborate closely with senior engineers throughout the hardware development lifecycle.

Skills

FPGA design

SystemVerilog

Simulation tools

Python

Digital design fundamentals

Clock domain crossing

Tools

ModelSim

Questa

Vivado

Job description

Selby Jennings is seeking an FPGA Engineer to join its crown‑jewel trading desk, focusing on FPGA for trading strategies. You will work on FPGA‑based, ultra‑low‑latency systems, contributing to design, verification, and validation in a collaborative environment.

You will develop synthesizable SystemVerilog, build testbenches, run simulations, and create Python automation tools, collaborating with senior engineers through the hardware development lifecycle.