Lead SoC Architect

CyberCoders; San Francisco (CA); Hybrid; USD 300,000 - 425,000; Full time

Benefits offered by this job

Medical/Dental/Vision benefits

Vacation/PTO

401K

Equity

Flexible Work Arrangements

Job summary

CyberCoders is seeking a Lead SoC Architect in the San Francisco Bay Area (SF or Los Altos), hybrid work, to define next-generation system-on-chip architecture and collaborate with our in-house team and external partners.

You will own the top-level architecture, select IP blocks (CPU, GPU, NPU), define interconnects and memory subsystems, and guide implementation from spec to silicon bring-up.

Qualifications

• 10+ years of SoC architecture or system-level design experience with shipping silicon and tapeouts on advanced nodes.
• Deep expertise with ARM-based CPU platforms and AMBA protocols.
• Experience with interconnect/NoC design and trade-offs (AXI, ACE, CHI).
• Experience integrating CPU, GPU and ML accelerators (NPU) for heterogeneous compute.
• Expertise in memory subsystems, DDR interfaces, caching and performance optimization.
• Familiarity with PCIe/UCIe and die-to-die connectivity.
• Strong system-level thinking, modeling skills and architecture documentation.
• Excellent leadership and collaboration across IP/partner ecosystems.

Responsibilities

• Own the SoC Architecture: translate product requirements into an executable blueprint.
• Drive System Integration: collaborate to integrate compute, fabric and SerDes.
• Manage Architectural Trade-offs: balance thermals, performance and power.
• Guide Execution: audit floorplanning, timing closure and routing with ASIC partners.

Skills

SoC architecture

ARM architecture

AMBA protocols

interconnect/NoC

CPU/GPU/NPU integration

memory subsystems

PCIe/UCIe expertise

system-level performance modeling

leadership of cross-functional teams

Education

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science or related field

Job description

Job Title: Lead SoC Architect

Job Location: San Francisco, CA or Los Altos, CA - hybrid

Compensation: $300K - $425K base DOE plus equity

Requirements: SoC Architecture, ARM Architecture, Advanced Nodes, AMBA Protocols (CHI, AXI, ACE, APB), CPU/GPU/NPU, HPC / Edge AI SoC

We're a well-funded, stealth startup building a next-generation, end-to-end computing platform powered by a custom, high-performance edge SoC on an advanced process node. By integrating flagship compute IP into an industry-leading design, we are building the optimized silicon foundation for our software platform from the ground up.

We're building a tight-knit, experienced in-house team to drive engineering outcomes and partner with a Tier-1 ASIC design house through the process. As our Lead SoC Architect, you will own the top-level system architecture, shaping the blueprint of our silicon and providing technical direction for both our core engineering team and external partners.

Position Overview

We are seeking a Lead SoC Architect to define and drive the architecture of next-generation system-on-chip products. The role is responsible for developing system-level architectures and interfaces, selecting and integrating IP (CPU, GPU, NPU and peripheral blocks), defining interconnect and memory subsystems, and delivering scalable, power- and performance-optimized SoC solutions. The Lead SoC Architect will lead cross-functional technical teams, work with silicon and IP partners, and guide implementation from specification through silicon bring-up.

Key Responsibilities

• Own the SoC Architecture: Own the overall SoC architecture, translating product requirements into executable engineering blueprint, and ensure our implementation partner's frontend team is setting the right bar.
• Drive System Integration: Collaborate seamlessly with the team to integrate compute, fabric, SerDes, etc.
• Manage Architectural Trade-offs: Take a data-driven approach to finding the balance between thermal constraints, performance goals, and power efficiency.
• Guide Execution: Serve as the primary technical bridge to our ASIC partner. You will actively audit their floorplanning, timing closure, and routing strategies to ensure the physical implementation preserves our architectural intent.

Qualifications

• Bachelors or Masters degree in Electrical Engineering, Computer Engineering, Computer Science or related field; advanced degree preferred.
• 10+ years of SoC architecture or system-level design experience with a proven track record of shipping silicon and successful tapeouts on advanced nodes.
• Deep expertise with SoC architecture principles including ARM-based CPU platforms and AMBA protocols.
• Hands-on experience and strong knowledge of interconnect and coherence protocols: AXI, ACE, CHI and NoC design and trade-offs.
• Practical experience integrating CPU, GPU and ML accelerators (NPU), and designing for heterogeneous compute.
• Experience with memory subsystems and DDR interfaces, caching strategies and system-level performance optimization.
• Familiarity with high-speed interfaces and standards such as PCIe and UCIe, and experience architecting die-to-die connectivity.
• Strong system-level thinking, performance/power modeling skills and architecture documentation experience.
• Excellent leadership, communication and collaboration skills with experience leading cross-functional teams and interacting with IP/partner ecosystems.
• Experience with RTL, firmware bring-up, silicon validation and production tape-out processes is highly desirable. #Enghp

Benefits

• Medical/Dental/Vision benefits
• Vacation/PTO
• 401K
• Equity
• Flexible Work Arrangements