Lead RISC‑V Core Verification & Test Generator

Tenstorrent; California (MO); Hybrid; USD 100,000 - 500,000; Full time

Benefits offered by this job

Highly competitive compensation

Comprehensive benefits package

Equal opportunity employer

Job summary

Tenstorrent is seeking a seasoned engineer with over 8 years of experience in CPU design verification to lead the development of CPU core-level test generators for high-performance RISC-V CPUs. This hybrid role offers an exciting opportunity to shape verification strategies in a collaborative environment.

The position involves guiding a small team while also engaging in hands-on implementation and debugging. A competitive compensation package ranges from $100k to $500k, reflecting experience and skills.

Qualifications

• 8+ years in CPU design verification, test generation, or related CPU validation work.
• Experience in leading development for x86, ARM, or RISC-V test generators.
• Understanding of high-performance out-of-order CPU microarchitecture.

Responsibilities

• Lead development of CPU core-level test generators for RISC-V cores.
• Own generator strategy for ISA and microarchitectural verification.
• Guide a small team of engineers while hands-on with implementation.

Skills

CPU design verification

Test generation

CPU ISA behavior

Automation and tooling

Cross-team communication

Job description

Tenstorrent is seeking a seasoned engineer with over 8 years of experience in CPU design verification to lead the development of CPU core-level test generators for high-performance RISC-V CPUs. This hybrid role offers an exciting opportunity to shape verification strategies in a collaborative environment.

The position involves guiding a small team while also engaging in hands-on implementation and debugging. A competitive compensation package ranges from $100k to $500k, reflecting experience and skills.