Lead Mixed-Signal IC Designer for Brain-Interface ASICs

Science

Alameda (CA)

On-site

USD 200,000 - 250,000

Full time

2 days ago
Be an early applicant
Application generator

A complete application in a minute — tailored resume and cover letter, ready to send.

Get past ATS filters

Benefits offered by this job

Competitive salary
Equity
Benefits
Healthy meals onsite
401(k)

Job summary

Science in California seeks an experienced Senior Mixed‑Signal IC Designer to lead advanced analog/mixed‑signal ASIC projects, translating requirements into silicon specs and guiding tapeouts. Candidates should have MSc/PhD in Electrical Engineering and 10+ years in mixed‑signal design, strong Verilog-A/Verilog, LVDS, and digital integration.

This role combines deep technical work with project leadership across Biology and Microfabrication teams.

Qualifications

  • MSc or PhD in Electrical Engineering with 10+ years of mixed-signal IC design
  • Strong analog/mixed-signal CMOS circuit design experience
  • Low-noise and low-power circuit design expertise
  • Verilog-A/Verilog knowledge for mixed-signal and digital circuits
  • Tapeout experience and ability to lead design teams

Responsibilities

  • Translate product requirements into chip design specifications with cross-group collaboration
  • Define architectures, building blocks and assign work to team
  • Oversee tapeout and chip bring-up, ensuring first-time silicon success
  • Lead design team and mentor engineers to grow in their roles
  • Plan projects with milestones, technical reviews and deliverables
  • Offer alternatives and analyses to resolve time-pressure challenges
  • Interface with PCB manufacturers, OSATs, and test houses for fabrication and testing

Skills

Mixed-signal IC design
Analog circuit design
Low-noise design
Low-power design
Verilog-A/Verilog
Digital circuit design
Tapeout experience
Project leadership
LVDS interfaces
RTL capture
Schematic to layout

Education

MSc or PhD in Electrical Engineering

Job description

Science in California seeks an experienced Senior Mixed‑Signal IC Designer to lead advanced analog/mixed‑signal ASIC projects, translating requirements into silicon specs and guiding tapeouts. Candidates should have MSc/PhD in Electrical Engineering and 10+ years in mixed‑signal design, strong Verilog-A/Verilog, LVDS, and digital integration.

This role combines deep technical work with project leadership across Biology and Microfabrication teams.

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

Senior Mixed-Signal ASIC Designer for Implantable NeuroTech
Senior Mixed-Signal ASIC Designer for Implantable NeuroTech

Science Corp • Alameda (CA), Northern (KY)

Hybrid
USD 200,000 - 250,000
Equity
Health insurance
Vacation & holidays
+4
Mixed-Signal IC Designer
Mixed-Signal IC Designer

Science • Alameda (CA)

On-site
USD 200,000 - 250,000
Competitive salary
Equity
Benefits
+2
Lead Mixed-Signal IC Designer for GHz ASICs
Lead Mixed-Signal IC Designer for GHz ASICs

Keysight Technologies SAles Spain SL. • Santa Clara (CA), Northern (KY)

Hybrid
USD 164,000 - 274,000
Results Bonus Program
Medical, dental and vision benefits
401(k) Plan
Mixed-Signal IC Designer
Mixed-Signal IC Designer

Science Corp • Alameda (CA), Northern (KY)

Hybrid
USD 200,000 - 250,000
Equity
Health insurance
Vacation & holidays
+4
Lead ASIC Chip Design Engineer
Lead ASIC Chip Design Engineer

Cypress HCM • Brooklyn Park (MN)

On-site
USD 150,000 - 205,000
Senior Analog/Mixed-Signal ASIC Design Lead
Senior Analog/Mixed-Signal ASIC Design Lead

Draper • Cambridge (MA)

On-site
USD 82,000 - 206,000
Senior Analog/Mixed-Signal IC Lead & Architect
Senior Analog/Mixed-Signal IC Lead & Architect

SiTime • Santa Clara (CA)

On-site
USD 164,800 - 226,600
401k plan
Health and wellness benefits including medical, dental, and vision
Time off plans
Senior Mixed-Signal IC Design Architect
Senior Mixed-Signal IC Design Architect

ASML • San Jose (CA)

On-site
USD 165,000 - 248,000
Analog IC Design Engineer
Analog IC Design Engineer

Fidelis Companies • California (MO)

On-site
USD 150,000 - 175,000
Lead Digital IC Designer - RTL/Verilog & ASIC IP
Lead Digital IC Designer - RTL/Verilog & ASIC IP

Science • Alameda (CA)

On-site
USD 150,000 - 220,000
Medical, dental, vision and life
Flexible vacation
401(k)
+1