Lead Functional Safety ASIC Designer (RTL/SoC)

MIPS Holding Inc; Austin (TX); On-site; USD 120,000 - 180,000; Full time

Job summary

GlobalFoundries is seeking an experienced Functional Safety Engineer to own hardware safety analysis for ARC MIPS processor IP, covering FMEDA, DFMEA, and FTA, with defense of safety arguments to automotive customers and assessors.

You will contribute to SoC-level safety for Custom Silicon programs, shape safety concepts across IP boundaries, and support ISO 26262 assessments in a growing safety-focused organization.

Qualifications

• Master's or Bachelor's degree in Electrical/Electronic Engineering, Computer Engineering or a related field.
• 8+ years ASIC/SoC design or verification experience, with substantial time spent on functional safety.
• Understanding of FMEDA, DFMEA and DFA for complex digital IP.
• Understanding with SoC-level integration and system-level safety concepts.
• Ability to read and analyze RTL (Verilog/SystemVerilog) and reason about microarchitecture — pipelines, caches, register files, memories.
• Understanding of processor architecture, and how safety mechanisms are realized within it.

Responsibilities

• Own hardware safety analysis for processor IP configurations: FMEDA, DFMEA, DFA and FTA, through to external assessment.
• Perform SoC-level safety analysis for Custom Silicon programs: integration of safety elements, system-level FMEDA, and the safety concept at the SoC boundary.
• Analyze dependent failures and freedom from interference across IP boundaries within an SoC.
• Derive and track safety metrics (SPFM, LFM, PMHF) and drive diagnostic coverage improvement together with the STL and verification teams.
• Define and review safety mechanisms at RTL level — ECC, parity, lockstep, register protection, watchdog — and verify they meet the claimed diagnostic coverage.
• Plan and interpret fault injection campaigns, and reconcile fault simulation results against the FMEDA.
• Produce and maintain safety work products: safety manual, safety analysis reports, safety case contributions, and assumptions of use.
• Maintain traceability from safety requirements through design to verification evidence.

Skills

FMEDA/DFMEA

RTL analysis

SoC safety concepts

Debugging

ISO 26262

Communication

Education

Bachelors/Master in EE/CE

Tools

VCS/Verdi

Jama

Python

TCL

VC Z01X

Job description

GlobalFoundries is seeking an experienced Functional Safety Engineer to own hardware safety analysis for ARC MIPS processor IP, covering FMEDA, DFMEA, and FTA, with defense of safety arguments to automotive customers and assessors.

You will contribute to SoC-level safety for Custom Silicon programs, shape safety concepts across IP boundaries, and support ISO 26262 assessments in a growing safety-focused organization.