Lead FPGA Engineer - Verilog & SystemVerilog Expert

Jobtome; California (MD); On-site; USD 120,000 - 160,000; Full time

Job summary

L3Harris Technologies in Cincinnati, OH, is seeking a Lead, Electrical Engineering FPGA to drive architecture, design and verification of next‑gen FPGA/ASIC hardware for DOD weapon systems.

The role centers on Verilog/SystemVerilog design, UVM verification, and C# microcontroller development, with strong emphasis on HDL practices, debugging and collaboration across hardware and firmware teams.

Qualifications

• Bachelor’s degree with 9+ years relevant experience; graduate degree with 7+ years; or 13+ years without a degree.
• Knowledge using Verilog for Logic Design.
• C for embedded systems, including algorithms, data structures and optimized code.
• Experience with lab tools: Logic Analyzers, oscilloscopes, JTAG/ICE debuggers and protocol analyzers.
• Familiar with hardware, software and firmware development methodologies to ensure quality and time-to-market.
• Familiar working with SVN, Git or TFS for version control.
• Digital design principles and HDL experience (Verilog, VHDL).

Responsibilities

• Analyze requirements, architecture definition, design and debug FPGA and related hardware and firmware.
• Develop Verilog HDL targeting Antifuse and enhanced Flash FPGAs.
• Analyze functional or performance issues with hardware and test environments.
• Contribute to process improvements for hardware-firmware quality and time-to-market.

Skills

Verilog

SystemVerilog

C for embedded systems

HDL design

Verilog/VHDL

Education

Bachelor’s Degree

Graduate Degree

Equivalent experience 13+ years

Tools

Logic Analyzers

Oscilloscopes

JTAG/ICE debuggers

Subversion (SVN)

Git

TFS

Job description

L3Harris Technologies in Cincinnati, OH, is seeking a Lead, Electrical Engineering FPGA to drive architecture, design and verification of next‑gen FPGA/ASIC hardware for DOD weapon systems.

The role centers on Verilog/SystemVerilog design, UVM verification, and C# microcontroller development, with strong emphasis on HDL practices, debugging and collaboration across hardware and firmware teams.