Lead Formal Verification Engineer – AI Silicon Platform

Acceler8

Texas

On-site

USD 250,000 - 350,000

Full time

3 days ago

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Job summary

Acceler8 Talent is seeking a Formal Verification Engineer to own formal verification for complex silicon designs and help shape the verification methodology for a next-generation AI compute platform. Based in Mountain View, CA or Austin, TX, this onsite role offers significant ownership and collaboration with RTL designers and verification engineers, with competitive base salary and startup equity.

Candidates should have hands-on experience with JasperGold/VC Formal, expertise in SystemVerilog

Qualifications

Strong hands-on experience with JasperGold, VC Formal or equivalent tools.
Deep expertise in SystemVerilog Assertions (SVA) and property development.
Experience solving complex proof-convergence challenges.
Background in CPU, GPU, ASIC, SoC or AI accelerator verification.
Experience delivering formal verification for production silicon.

Responsibilities

Develop formal verification strategies for complex CPU, GPU and AI accelerator designs.
Write assertions, properties and formal verification plans from scratch.
Solve challenging proof-convergence problems using abstraction and decomposition.
Work closely with RTL designers and verification engineers to identify design issues.
Help establish formal verification methodologies for next-generation silicon.