Lead DRAM Systems Architect & AI Modeling

Micron; San Jose (CA); On-site; USD 200,000 - 260,000; Full time

Job summary

Micron Technology, located in California, seeks a Distinguished Member of Technical Staff to lead architecture analysis for AI, cloud and enterprise platforms. The role spans memory-device details up to data-center modeling to guide product and roadmap decisions.

You will optimize across the full stack, collaborate with engineering teams, mentor staff, and contribute to standards bodies, leveraging deep memory expertise and a proven data-driven leadership track.

Qualifications

• PhD or MS in Electrical/Computer Engineering or CS.
• 15+ years in memory/storage architecture or performance engineering.
• Demonstrated ability to influence product direction through data analysis.
• Strong record of patents, publications or industry technical leadership.
• Ability to turn complex analysis into clear recommendations for architecture and business stakeholders.
• Owns decisions where AI is part of the process, and applies responsible AI use and AI governance policies.

Responsibilities

• Lead architecture analysis for AI, cloud and enterprise platforms from memory devices up to data center.
• Analyze DRAM architecture, device organization, electrical, thermal and power behavior with system modeling.
• Quantify tradeoffs across cost, power, latency, bandwidth and reliability.
• Drive optimization across the full stack: applications, OS, memory controllers, firmware and subsystems.
• Provide recommendations on memory features, controller requirements, training flows and power management.
• Represent Micron in standards bodies and ecosystem initiatives.

Skills

Memory architecture

System architecture

Performance engineering

AI governance

Technical leadership

Education

PhD or MS in Electrical/Computer Engineering or CS

Job description

Micron Technology, located in California, seeks a Distinguished Member of Technical Staff to lead architecture analysis for AI, cloud and enterprise platforms. The role spans memory-device details up to data-center modeling to guide product and roadmap decisions.

You will optimize across the full stack, collaborate with engineering teams, mentor staff, and contribute to standards bodies, leveraging deep memory expertise and a proven data-driven leadership track.