Lead Display Silicon Architect

Socket.dev; Cupertino (CA); On-site; USD 180,000 - 300,000; Full time

Job summary

Apple is seeking a senior ASIC architect to lead the design and integration of next-generation display silicon for its products. You will define architecture, drive simulation validation, and work with internal teams and external vendors to deliver high-volume ICs that power premium display experiences.

You will guide the engineering requirements, collaborate across hardware and software teams, and help shape the roadmap for future display subsystems, ensuring robust performance and

Qualifications

• BS and 10+ years in chip architecture or analog mixed-signal design.
• Experience in high-volume IC design, integration, and launch.
• Knowledge of digital/analog IC design fundamentals and rigorous process development.
• Ability to conduct silicon debugging experiments and analyze data.
• Strong written and verbal communication and ownership.

Responsibilities

• Architecting the display silicon and display sub-system.
• Establishing display driver IC critical blocks design rules and guidelines.
• Authoring display silicon engineering requirement specification.
• Working with the silicon teams to perform and review simulations.
• Working with cross-functional teams to optimize the design for custom Apple products.
• Defining the roadmap for the next generation display silicon and display subsystem.
• Managing silicon and system-level risk and performance tradeoffs.

Skills

Chip architecture

Analog/mixed-signal

High-speed links

Silicon validation

Technical leadership

Experimentation

Education

Bachelor's degree in Electrical Engineering

Tools

MATLAB

Verilog

Python

SPICE

Job description

Apple is seeking a senior ASIC architect to lead the design and integration of next-generation display silicon for its products. You will define architecture, drive simulation validation, and work with internal teams and external vendors to deliver high-volume ICs that power premium display experiences.

You will guide the engineering requirements, collaborate across hardware and software teams, and help shape the roadmap for future display subsystems, ensuring robust performance and