A leading aerospace company in Hawthorne seeks a Principal ASIC Design Engineer for the Starshield project, focusing on developing cutting-edge digital ASICs and FPGAs for national security. The role involves collaboration with verification teams and managing architectural trade-offs to deliver effective designs. Ideal candidates have extensive experience in FPGA/ASIC development and are ready to work in a dynamic environment that values teamwork and innovation. The position offers a competitive salary and a comprehensive benefits package.
Qualifications
8+ years of experience in RTL implementation and/or FPGA/ASIC development.
Experience with multicore CPU subsystem design.
Experience with high speed and low power design techniques.
Responsibilities
Design digital ASICs and/or FPGAs for Starshield projects.
Evaluate architectural trade‑offs based on features and performance.
Define micro‑architecture and implement RTL in Verilog/System Verilog.
Skills
RTL implementation
FPGA/ASIC development
Problem solving
Power optimization
Teamwork
Education
Bachelor’s degree in electrical engineering
Bachelor’s degree in computer engineering
Bachelor’s degree in computer science
Tools
VCS
Questa
Xilinx Vivado
Altera Quartus II
Job description
A leading aerospace company in Hawthorne seeks a Principal ASIC Design Engineer for the Starshield project, focusing on developing cutting-edge digital ASICs and FPGAs for national security. The role involves collaboration with verification teams and managing architectural trade-offs to deliver effective designs. Ideal candidates have extensive experience in FPGA/ASIC development and are ready to work in a dynamic environment that values teamwork and innovation. The position offers a competitive salary and a comprehensive benefits package.