Junior SoC Verification Engineer — Pre-Silicon & Emulation

Intel Corporation; Folsom (CA); On-site; USD 106,000 - 149,000; Full time

Job summary

Intel Corporation is seeking an entry-level SoC Design Verification Engineer to join the Data Center Group in the US. You will verify intricate Xeon server SoCs, develop scalable verification plans, and collaborate with RTL, post-silicon, and design teams to ensure robust, secure silicon.

The role emphasizes functional verification, emulation validation, and continuous improvement of verification methodologies within a fast-paced server Xeon environment.

Qualifications

• Master’s degree in Electrical Engineering, Computer Science or Computer Engineering.
• +6 months of experience in Silicon Design and/or Validation/Verification methodologies and tools.

Responsibilities

• Perform functional verification and emulation validation of integrated SoCs to ensure designs meet specifications.
• Develop scalable and reusable block, subsystem, and SoC verification plans, test benches, and environments.
• Execute verification plans, analyze system simulation models, and debug power and performance issues.
• Root-cause failure issues and implement corrective measures in the pre-silicon environment.
• Collaborate with architects, RTL developers, post-silicon teams, and physical design experts to enhance verification.
• Document test plans and drive technical reviews with design and architecture teams.
• Conduct regression and debug tests to integrate security activities and ensure comprehensive coverage.
• Maintain and improve verification infrastructure and methodology, absorbing learnings from post-silicon validations.

Skills

Debugging

Scripting

Education

Master’s degree in Electrical Engineering, Computer Science or Computer Engineering

Tools

UVM/SystemVerilog

Emulation tools

Test benches

Coverage-based verification

Job description

Intel Corporation is seeking an entry-level SoC Design Verification Engineer to join the Data Center Group in the US. You will verify intricate Xeon server SoCs, develop scalable verification plans, and collaborate with RTL, post-silicon, and design teams to ensure robust, secure silicon.

The role emphasizes functional verification, emulation validation, and continuous improvement of verification methodologies within a fast-paced server Xeon environment.