Junior FPGA Engineer

Thurn Partners; Chicago (IL); On-site; USD 120,000 - 180,000; Full time

Benefits offered by this job

Medical coverage (PPO/HDHP)

Dental & Vision coverage

HSA with company contributions

FSA offered

Paid time off

Life insurance

401(k) with company match

On-site catered meals

Monthly tech stipend

EAP

Supplemental life & AD&D

Pet insurance

Job summary

Thurn Partners, a world-leading quantitative trading firm, is seeking an FPGA Engineer to join its hardware team in Chicago. You will take RTL designs through verification, own reusable IP blocks, and help scale hardware across the firm's global footprint.

Responsibilities include writing and verifying RTL for live trading systems, building portable IP, and bridging hardware with software and research teams. The role offers strong compensation and comprehensive benefits from day one.

Qualifications

• Hands-on FPGA/ASIC design and verification.
• Track record building reusable IP across platforms.
• Strong grasp of digital design fundamentals.
• Fluency in HDL - SystemVerilog, Verilog, or VHDL.
• Comfort with standard EDA toolchains.
• Working C++ ability.
• Scripting in TCL, Python, or Bash.
• Degree in EE, CS, CE, or adjacent field, or on track to complete by Jan 2026.
• Nice to have exposure to high-speed transceivers, networking protocols, or packet processing.

Responsibilities

• Write and verify RTL for live trading systems.
• Build IP components designed to be reused across multiple platforms.
• Bridge hardware designs into the wider tech stack.
• Automate workflows and tooling via scripting.
• Work day to day alongside software, research, and systems engineers.

Skills

FPGA/ASIC design

SystemVerilog/Verilog/VHDL

C++

Scripting TCL/Python/Bash

EDA toolchains

Reusable IP design

Education

Bachelor's degree in EE/CS/CE or related

Tools

EDA toolchains

Job description

Location: Chicago

The Role

A world leading quantitative trading firm is hiring an FPGA Engineer to join its hardware team, building the circuits and IP that power its automated trading infrastructure. You'll take designs from RTL through verification, own reusable IP blocks, and help scale hardware across the firm's global footprint.

What You'll Need

• Hands-on professional background in FPGA/ASIC design and verification
• Track record building IP that's reusable and portable across platforms, not one-off designs
• Strong grasp of digital design fundamentals
• Fluency in at least one HDL - SystemVerilog, Verilog, or VHDL
• Comfort with standard EDA toolchains
• Working C++ ability
• Scripting chops in TCL, Python, or Bash
• A degree in EE, CS, CE, or an adjacent technical field, or on track to complete one by January 2026
• A plus: exposure to high-speed transceivers, networking protocols, or packet processing

What the Job Looks Like

• Write and verify RTL for live trading systems
• Build IP components designed to be reused across multiple platforms
• Bridge hardware designs into the wider tech stack
• Automate workflows and tooling via scripting
• Work day to day alongside software, research, and systems engineers
• Medical (PPO and HDHP options) starting day one, with employer paid plans available
• Dental and vision covered by the employer from day one
• HSA with company contributions up to the IRS max; FSA also offered
• PTO, paid holidays, parental leave for eligible full-time staff
• Employer paid life insurance
• 401(k) - Traditional, Roth, and After-Tax options, immediate vesting, company match
• On-site catered meals, stocked kitchen, and meal delivery stipends
• Monthly tech stipend
• EAP
• Optional add-ons: supplemental life & AD&D, pet insurance

Pre-Application:

• You must be eligible to live and work in the US, without requiring sponsorship
• Please ensure you meet the required experience section prior to applying
• Allow 1-5 working days for a response to any job enquiry

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