Junior Design Verification Engineer - Wireless SOCs

Socket.dev; Austin (TX); On-site; USD 110,000 - 160,000; Full time

Benefits offered by this job

Health insurance

401(k) matching

Paid time off

Parental leave

Job summary

Amazon Leo seeks an engineer to define and implement SOCs for communications via LEO satellites and gateways. You will verify RTL against Matlab/C models and contribute to system-level verification using UVM test benches.

The role emphasizes automated regression environments, collaboration with design and systems teams, and advanced verification in modern CMOS tech. Export controls apply and US citizenship or equivalent is required.

Qualifications

• Bachelor's degree or higher in Electrical/Communications Engineering or Computer Science.
• 2+ years in verification, preferably in communication systems.
• 2+ years in UVM.

Responsibilities

• Implement a state of the art verification environment for RTL testing against Matlab/C models.
• Develop test plans, write tests, run regressions, collect coverage, report progress.
• Participate in validation of ASIC implementations in Verilog/SystemVerilog.
• Work with design and systems teams on system level verification using UVM test benches.
• Develop an automated environment to run regressions and manage the database.

Skills

Digital verification

UVM

Matlab familiarity

Modem design verification

SystemC / C

Education

Bachelor's degree in Electrical / Communications Engineering or Computer Science

Master's or Ph.D in Electrical / Communications Engineering

Tools

SystemC

C

Matlab

Job description

Amazon Leo seeks an engineer to define and implement SOCs for communications via LEO satellites and gateways. You will verify RTL against Matlab/C models and contribute to system-level verification using UVM test benches.

The role emphasizes automated regression environments, collaboration with design and systems teams, and advanced verification in modern CMOS tech. Export controls apply and US citizenship or equivalent is required.