Interposer Automation Engineer: AI-Driven VLSI Flows

NVIDIA

Austin (TX)

On-site

USD 136,000 - 264,500

Full time

14 days+

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Job summary

NVIDIA is seeking an experienced engineer to design and develop VLSI flows for interposer design, applying Python and C++ to create maintainable tools and scalable workflows. You will work with world-class engineers and leverage AI/ML techniques to enhance engineering processes and design analysis.

The role requires a BS in CS/EE (or related) and 5+ years of experience, strong fundamentals in Python/C++, and a solid understanding of VLSI interposer design concepts.

Qualifications

  • BS in Computer Science, Electrical Engineering, or a related field, and 5+ years of flow and methodology development experience for interposer design at scale.
  • Strong Python and/or C++ fundamentals, with data structures, algorithms, OO design, and code quality practices.
  • Experience applying AI/ML techniques in engineering workflows, such as AI-assisted flows in EDA environments or ML-enabled design tools.
  • Solid understanding of electrical engineering fundamentals relevant to VLSI interposer design (signal integrity, power delivery, parasitic extraction).

Responsibilities

  • Collaborate with interposer engineers to design and develop VLSI flows and methodologies.
  • Develop applications to enable project engineers with maintainability and ease of use.
  • Create flows/tools to construct, analyze, and validate interposer designs at various production stages.
  • Optimize daily workflows of top interposer designers.

Skills

Python
C++
AI/ML techniques
Data structures
Algorithms

Education

Bachelor's degree in Computer Science, Electrical Engineering, or related field

Job description

NVIDIA is seeking an experienced engineer to design and develop VLSI flows for interposer design, applying Python and C++ to create maintainable tools and scalable workflows. You will work with world-class engineers and leverage AI/ML techniques to enhance engineering processes and design analysis.

The role requires a BS in CS/EE (or related) and 5+ years of experience, strong fundamentals in Python/C++, and a solid understanding of VLSI interposer design concepts.

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