IC design Implementation and SignOff Architect, (STA SignOff)

Cadence Design Systems

Beaverton (OR)

Sur place

USD 154 000 - 286 000

Plein temps

14 jours+

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Avantages offerts par ce poste

Paid vacation
401(k) match
Employee stock purchase plan
Medical/dental/vision

Résumé du poste

Cadence Design Systems in Beaverton, OR seeks a senior leader to drive timing signoff strategy and large-scale IC design programs. You will guide customer success, collaborate with design teams, and champion advanced node timing across 3nm and below using Cadence tools.

The role demands exceptional communication, executive-level collaboration, and a track record of delivering complex signoff solutions with a strong scripting background.

Qualifications

  • 15+ years of experience in IC design implementation and signoff.
  • Deep expertise in digital design fundamentals and advanced node STA/ECOs.
  • Proven track record leading technical teams and executive-level customer engagements.

Responsabilités

  • Lead technical engagements with customers and partners to drive adoption of Cadence signoff portfolio.
  • Collaborate with R&D and Product Engineering to influence tool enhancements.
  • Drive benchmarks, flow optimizations, and deployment of timing signoff methods.
  • Represent Cadence at industry forums and deliver technical papers or speeches.

Connaissances

IC design
Timing signoff
Scripting
Leadership

Formation

BS/MS in Electrical/Computer Engineering

Outils

Cadence Tempus
Certus
QRC

Description du poste

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Key Responsibilities
  • Technical Expertise: Lead technical engagements with customers and partners to drive & adoption of Cadence signoff portfolio. Work closely with design teams to meet customer success metrics, guide adoption of Cadence’s timing signoff & closure and AgenticAI features across advanced nodes (5nm and below).
  • Cross-Functional Collaboration: Partner with R&D and Product Engineering to influence tool enhancements based on real-world customer requirements.
  • Innovation & Enablement: Drive complex benchmarks, flow optimizations, and deployment of cutting-edge methodologies for timing signoff & closure, STA, IR Drop, and power/timing closure.
  • Thought Leadership: Represent Cadence at industry forums, author technical papers, and deliver keynote presentations to position Cadence as a market leader.
Requirements
  • 15+ years of experience in IC design implementation and signoff, with demonstrated success in managing large-scale technical programs.
  • Deep expertise in digital design fundamentals, advanced node STA & ECOs (3nm and below), and EDA tool ecosystems.
  • Core timing signoff expertise, advanced node STA, UPF & constraints debugging, hierarchical & 3DIC design STA and closure solutions.
  • Proven track record of leading technical teams and driving customer success at executive levels.
  • Strong proficiency in scripting (Tcl, Python, Perl) and flow customization for design closure.
  • Excellent communication, negotiation, and leadership skills with the ability to influence internal and external stakeholders.
  • Prior experience with Cadence tools (Tempus, Certus, QRC) and competitive solutions highly desirable.
  • BS/MS in Electrical Engineering, Computer Engineering, or related field.

The annual salary range for Washington is $154,000 to $286,000.

You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure.

Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

We welcome applications from candidates with disabilities and in equity seeking groups. If you have accessibility needs during the application and interview process, we encourage you to make your needs known.

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