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An established industry player is seeking a High Speed RTL Design Engineer with extensive experience in RTL design and proficiency in Verilog-HDL/SystemVerilog. This role involves designing and implementing high-speed digital circuits, ensuring optimal performance while working collaboratively across teams. The ideal candidate will have a deep understanding of digital design for data converters and strong analytical skills. Join a forward-thinking company that offers a competitive salary, comprehensive benefits, and a dynamic work environment where innovation thrives.
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MS or PhD in Electrical Engineering or Computer Engineering with 10+ years of experience in RTL design.
Proficient with Verilog-HDL/SystemVerilog coding.
Proficient with front-end tools such as NCVerilog, NCSIM/VCS, Simvision, Lint, Spyglass.
Exposure to Design for Test, understanding of scan concepts, and writing DFT-friendly RTL.
Experience with digital design for data converters: ADCs and DACs, with understanding of relevant DSP principles such as sampling, noise shaping, and filtering.
Experience in synthesis, CDC, static timing analysis.
Exposure to SDF-annotated simulations with a good understanding of parasitic delays.
Experience in design management with detailed knowledge of development methodologies, design flows including EDA integration, foundry PDK, and associated collaterals.
Strong analytical thinking and problem-solving skills with excellent attention to detail.
Must be organized, self-motivated, and able to work effectively across internal and external teams.
Must have excellent knowledge/experience with TSMC 7nm-2nm processes, understanding of power consumption, area, estimated design and layout efforts for digital and analog blocks, and technology limitations.
Implementation of digital processing stages for oversampled bitstream processing including decimation and interpolation.
Digital filter design including CIC, FIR, and IIR architectures.
Digital delta-sigma loop design for the digital frontend of delta-sigma DACs.
Understanding of microarchitecture with standard peripherals such as AMBA BUS, I2C, SPI, UART.
Deep understanding of Signal Integrity and Power Integrity modeling for High-Speed designs.
Understanding & exposure to Verilog AMS simulation; experience in behavioral models of analog circuits is helpful.
Willing to work in a multifunctional role.
Strong written and verbal communication skills, with the ability to communicate effectively at various technical and management levels.
Proactive, collaborative, and creative approach to innovation, technical development, and consensus facilitation to achieve optimal project results.
Excellent time and task management, and interpersonal skills.
Compensation and Benefits
The annual base salary range for this position is $141,000 - $225,000.
This position is eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Broadcom offers a comprehensive benefits package including medical, dental, and vision plans, 401(k) with company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), paid holidays, sick leave, and vacation. The company complies with all applicable laws for paid family leave and other leaves of absence.
Broadcom is an equal opportunity employer. We consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability, medical condition, pregnancy, protected veteran status, or any other characteristic protected by law. We also consider qualified applicants with arrest and conviction records consistent with local law.
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