High Speed PHY System Architect

Jobtailor; California (MO); On-site; USD 150,000 - 190,000; Full time

Job summary

Jobtailor is seeking a senior engineer to develop and drive analog and mixed-signal IP architectures for AMS IPs used in SoCs. You will conduct top-down architectural analyses and transistor-level feasibility studies to define microarchitectures that optimize performance, power, and area across diverse product segments.

You will enhance system performance using digitally assisted analog techniques and review cross-functional technology trends to set future AMS IP targets.

Qualifications

• Bachelor's or higher in Electrical Engineering/Computer Engineering or related STEM field with 9+ years of experience
• Master's in Electrical or Computer Engineering with 6+ years of experience
• PhD in Electrical or Computer Engineering with 3+ years of experience
• Analogue and mixed-signal circuit design within standard CMOS technologies
• Backend verification tools such as Monte Carlo simulations
• Analog behavior modeling and system-level understanding of AMS
• Hands-on experience with transmission line theory and AMS system modeling
• Architectural feature definition, high-speed design techniques, and IP architecture definition
• Proven experience with high speed PHY designs from concept through qualification

Responsibilities

• Develop and drive analog and mixed-signal IP architectures for AMS IPs
• Perform architectural analysis and transistor-level feasibility studies
• Define microarchitectures for next-generation AMS IPs for SoC integration
• Enhance system performance with digitally assisted analog techniques
• Provide proof-of-concept design alternatives for AMS systems
• Collaborate with IP design and verification teams to validate AMS IPs
• Support SoC architects and designers in selecting/configuring AMS-based SoCs
• Perform modeling, simulation, and optimization for power, area, and performance

Skills

AMS design

System modeling

High-speed PHY design

Power/area optimization

Monte Carlo verification

Transistor-level feasibility

Education

Bachelors in Electrical/Computer Eng

Masters in Electrical/Computer Eng

PhD in Electrical/Computer Eng

Tools

Monte Carlo simulations

Job description

Responsibilities

• Develop and drive analog and mixed-signal IP architectures, signal processing algorithms, and calibration algorithms for system-on-chip (SoC) independent AMS IPs
• Conduct top-down architectural analysis of AMS systems and perform transistor-level feasibility studies for various AMS circuits
• Design novel architectures and define microarchitectures for next-generation AMS IP to achieve optimal performance, power, and area for diverse product segments
• Enhance system performance by leveraging digitally assisted analog techniques and optimizing the partitioning of analog and digital circuits
• Evaluate trade-offs, explore innovative approaches, and provide proof-of-concept design alternatives for AMS systems
• Collaborate with IP design and verification teams to define, develop, and validate robust AMS IPs for SoC integration
• Support SoC architects, design engineers, and verification engineers in selecting, configuring, and validating SoCs that leverage AMS IPs
• Perform modeling, simulation, and optimization for power, area, and performance metrics, analyzing test results to identify improvement opportunities
• Define future AMS IP technology targets by influencing cross-functional roadmaps and reviewing emerging technology trends

Requirements

• Bachelor's degree in Electrical Engineering, Computer Engineering, or related STEM field with 9+ years of experience
• OR Master's degree in Electrical Engineering, Computer Engineering, or related STEM field with 6+ years of experience
• OR PhD in Electrical Engineering, Computer Engineering, or related STEM field with 3+ years of experience
• Analog and mixed-signal circuit design within standard CMOS technologies
• Backend verification tools such as Monte Carlo simulations
• Analog behavior modeling and system-level understanding of AMS circuits
• Hands‑on experience with transmission line theory and AMS system modeling
• Architectural feature definition, high-speed design techniques, and IP architecture definition
• Proven experience with high speed PHY designs from concept through qualification