High Speed IO Analog Mixed Signal Architect/ Design Engineer

Advanced Micro Devices, Inc.; San Jose (CA); On-site; USD 180,000 - 260,000; Full time

Job summary

Advanced Micro Devices, Inc. (AMD) is seeking a senior AMS design leader in San Jose, CA to drive high-speed IO and memory interface IP block design.

You will oversee architecture, verification plans, and cross-functional collaboration with system, SOC, and layout teams to deliver production-ready IP. The ideal candidate has hands-on experience with multi-Gbps interfaces, analog/mixed-signal design, and a track record of bringing AMS designs to production.

Qualifications

• MS or PhD in Electrical, Computer Engineering or related equivalent.
• Experience leading others in technical settings and strong communication.
• Hands-on design experience with multi-Gbps interfaces and analog/mixed-signal blocks.

Responsibilities

• High Speed IO/DDR/die-to-die SerDes AMS circuit architecture and design.
• Lead definition, review and sign-off on analog/mixed-signal IP top-level architecture and specifications.
• Collaborate with System/Platform & SOC architects to translate system specs to AMS blocks.
• Author AMS blocks circuit and architecture specs, pre-silicon verification, post-silicon characterization/test plans.
• Supervise pre-silicon layout, post-silicon characterization and debug.
• Support product bring-up and sign-off on test-plans and characterization reports.

Skills

Multi-Gbps SerDes

High-speed memory interfaces

Analog/mixed-signal design

Clocking techniques

AMS design flows

Cadence tools

System-level collaboration

Pre/post-silicon verification

Power/area trade-offs

FinFET CMOS

Education

MS/PhD in Electrical/Computer Engineering

Tools

Cadence

Virtuoso

Spectre

HSPICE

Job description

Overview

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers to PCs, gaming and embedded systems. We value innovation, collaboration and diverse perspectives as we shape the future of AI and beyond. We advance your career through bold ideas and execution excellence.

The Role

Be part of AMD's analog/mixed signal IP design team responsible for the design and development of next generation IOs, high speed memory (LPDDRx, gDDRx, HBMx) and die-to-die Gbps proprietary PHY IP solutions. Establishes and maintains AMD's technological leadership position in analog circuit architecture and design with a proven track record for problem solving and innovation.

The Person

The ideal candidate has experience leading others in technical settings. You also have excellent communication, writing, and presentation skills.

Key Responsibilities

• High Speed IO/DDR/die-to-die (d2d)/SerDes AMS circuit architecture and design
• Lead Definition, review and sign-off on analog/mixed signal IP top level architecture and component/circuit level specifications
• Work and collaborate with System/Platform & SOC architects to translate system level specs to AMS blocks/circuit level specifications
• Author AMS blocks circuit and architecture technical specifications, AMS pre-silicon verification, AMS post-silicon characterization/validation test plans
• Supervise pre-silicon layout, post-silicon characterization and debug
• Support product bring-up and debug, and Sign-off on test-plans and characterization reports

Preferred Experience

• Hands-on design experience in multi-Gbps serial interfaces (PCIe, USB, etc.), parallel high BW memory interface PHY/IOs (LPDDRx, HBM, gDDR, etc.) and die-to-die/chip-to-chip links PHY IPs
• Strong fundamentals and knowledge of mixed signal circuit architecture and design techniques for receiver/transmitter and PLL/DLL/clocking; deep knowledge of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power and low-noise techniques
• Experience designing analog mixed-signal circuit blocks including DLLs, phase interpolator, low jitter clock distribution, bandgap, biasing circuits, LDO regulators, amplifiers, comparators; experience in mixed signal blocks such as digital/analog DLLs, duty cycle corrector, clock and data recovery, clock mixer
• Understanding of high-speed IO signaling topologies and architectures including system-silicon co-design/co-optimizations for best-in-class PPA
• Understanding of high speed IO link budget analysis and jitter/SNR metrics and design trades
• Experience in low power design techniques for high speed digital design and analysis including transistor level timing sign-off
• Understanding of power, area and performance trade-offs in mixed signal IP design
• Design experience in FinFET advanced CMOS process nodes 16nm/7nm/3nm and below with understanding of transistor device performance
• Proficient in AMS design flows, tools, and methodologies; familiar with Cadence schematic capture, Virtuoso, Spectre and/or HSPICE
• Ability to work with project managers, system architects, IC designers and physical designers to guarantee quality and timely deliverables
• Analytical thinker with a quality-oriented mindset and strong technical and management communication skills
• Track record of successfully taking AMS designs to production
• Excellent written and verbal communication skills; able to work cross-functionally and across geographies in a dynamic environment
• Demonstrates initiative and ownership of tasks and responsibilities

Academic Credentials

• MS or PhD in Electrical, Computer Engineering or related equivalent

Location

San Jose, anywhere in California

This role is not eligible for visa sponsorship.

Benefits

Benefits offered are described: AMD benefits at a glance.

Equal Opportunity

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants\' needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD\'s "Responsible AI Policy" is available here.

This posting is for an existing vacancy.