HBM IO Architecture, Principal Engineer

Micron Technology, Inc; Richardson (TX); On-site; USD 130,000 - 160,000; Full time

Benefits offered by this job

Choice of medical, dental, and vision plans

Paid family leave

Robust paid time-off program

Job summary

Micron Technology, Inc in Richardson, Texas is seeking a Principal Engineer in HBM IO Design Architecture to lead initiatives for HBM IO circuits and PHY architecture. This pivotal role influences multi-generation product direction and establishes high-speed IO design standards.

The ideal candidate will have a Bachelor’s degree in Electrical Engineering, at least 7 years of experience in memory or high-speed IO design, and strong communication skills to guide cross-team technical direction. Benefits include comprehensive healthcare plans and paid time off.

Qualifications

• 7+ years of hands-on experience in memory or high-speed IO design.
• Deep expertise in analog and mixed-signal CMOS circuit design.
• Strong experience with high-speed IO architectures.

Responsibilities

• Define and own HBM IO and data path architecture across products.
• Architect and analyze TSV-based HBM link schemes.
• Drive alignment across design and process teams.

Skills

Analog and mixed-signal CMOS circuit design

High-speed IO architectures (Rx/Tx, PLL, DLL)

Excellent communication skills

Education

Bachelor’s degree in Electrical Engineering

Master’s degree or PhD in Electrical Engineering

Job description

HBM IO Architecture, Principal Engineer

As a Principal Engineer in HBM IO Design Architecture, you will be the technical authority for HBM IO circuits and PHY architecture. You will lead multi‑generation IO initiatives spanning TSV link definition, PHY circuit architecture, IO training features, and silicon validation. This role is critical to maintaining Micron’s leadership in HBM speed, power efficiency, and quality, and offers the opportunity to shape long‑term architectural direction across the organization.

Responsibilities

• Define and own HBM IO and data path architecture across multiple product generations from pathfinding through tape‑out.
• Architect and analyze TSV‑based HBM link schemes including topology, signaling strategy, and parasitic co‑design.
• Define and drive HBM PHY IO training features to ensure robust PVT margin across product generations.
• Architect high‑speed IO circuits for the HBM interface die targeting best‑in‑class bandwidth and power efficiency.
• Establish IO and TSV design standards and drive alignment across design, product, package, and process teams.

Minimum Qualifications

• Bachelor’s degree in Electrical Engineering or equivalent experience.
• 7+ years of hands‑on experience in memory or high‑speed IO design with proven silicon success.
• Deep expertise in analog and mixed‑signal CMOS circuit design and simulation.
• Strong experience with high‑speed IO architectures such as Rx/Tx, PLL, DLL, DCC, phase interpolators, or equalizers.
• Excellent communication skills with the ability to influence technical direction across teams.

Preferred Qualifications

• Master’s degree or PhD in Electrical Engineering or related field.
• 10+ years of experience in HBM, DRAM, or advanced memory interface design.
• Patents, publications, or trade secrets in high‑speed IO, TSV interfaces, or IO training.
• Experience with HBM, LPDDR, UCIe, or other JEDEC memory standards.
• Demonstrated technical leadership across multi‑disciplinary, multi‑generation programs.

Benefits

Micron offers a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect income if unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time‑off program and paid holidays.

Equal Opportunity Employer

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.