HBM 3D Power Delivery Network (PDN) Engineer

Dormont Manufacturing Co; Folsom (CA); On-site; USD 146,000 - 297,000; Full time

Job summary

Micron Technology is seeking an HBM PDN Engineer to design, analyze, and optimize power delivery networks for next-generation HBM products. You will work with architecture, design, physical design, packaging, and product teams to meet aggressive performance, power integrity, and reliability targets.

This role focuses on PDN design, EM/IR analysis, and cross-domain optimization across technology, design, and layout, with signoff and debugging responsibilities across pre- and post-silicon phases.

Qualifications

• Strong experience in power delivery network design and analysis for complex SoCs or high-performance ASICs.
• Proficiency with EM/IR analysis tools such as RedHawk, Totem, or equivalent.
• Proficiency with Spice-based simulation tools and 3D modeling of PDN networks.
• Solid understanding of IR drop, electromigration, dynamic voltage droop, and power noise mechanisms.
• Experience with physical design flows and interaction with floorplanning, routing, and implementation teams.
• Familiarity with RTL-to-GDSII design flow and signoff methodologies.
• Strong analytical and debugging skills with the ability to drive complex issues to closure.

Responsibilities

• Design and develop SoC-level and HBM-cube-level power delivery networks for HBM designs, including power grid architecture, routing strategies, and decoupling schemes.
• Perform EM/IR analysis and optimization using industry-standard tools to ensure power integrity across dynamic workloads.
• Collaborate with physical design teams on floorplanning, placement, and routing strategies to enable efficient PDN implementation.
• Drive power integrity closure across multi-mode/multi-corner scenarios, identifying and mitigating droop, noise, and electromigration risks.
• Work with package and system teams to co-optimize die-package-system PDN interactions, including bump/pad assignment and current distribution.
• Develop and validate power models, including activity-based current profiles and transient analysis for realistic workload scenarios.
• Partner with architecture and design teams to influence power-aware design decisions, including power domains, gating strategies, and current demand shaping.
• Support signoff activities, including EM, IR, and reliability verification, ensuring design meets long-term reliability and manufacturability goals.
• Debug and root-cause PDN-related issues during pre-silicon and post-silicon phases, including silicon correlation and model refinement.
• Improve PDN methodologies through automation, scripting, and best-practice development across HBM programs.

Skills

PDN design

EM/IR analysis

Power integrity

Debugging

Scripting

Cross-functional collaboration

Mentoring

Education

Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field

Tools

RedHawk

Totem

Spice-based PDN simulations

Job description

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

HBM Power Delivery Network (PDN) Engineer, you will be part of the Heterogeneous Integration Group (HIG), responsible for the design, analysis, and optimization of power delivery networks for next-generation HBM products. You will work closely with architecture, design, physical design, packaging, and product engineering teams to ensure robust, efficient, and manufacturable power delivery solutions that meet aggressive performance, power integrity, and reliability targets.

This is a hands-on technical role focused on PDN design, EM/IR analysis, and cross-domain optimization across technology, design, and layout.

Key Responsibilities

• Design and develop SoC-level and HBM-cube-level power delivery networks for HBM designs, including power grid architecture, routing strategies, and decoupling schemes.
• Perform EM/IR analysis and optimization using industry-standard tools (e.g., Cadence RedHawk, Ansys Totem) to ensure power integrity across dynamic workloads.
• Collaborate with physical design teams on floorplanning, placement, and routing strategies to enable efficient PDN implementation.
• Drive power integrity closure across multi-mode/multi-corner scenarios, identifying and mitigating droop, noise, and electromigration risks.
• Work with package and system teams to co-optimize die-package-system PDN interactions, including bump/pad assignment and current distribution.
• Develop and validate power models, including activity-based current profiles and transient analysis for realistic workload scenarios.
• Partner with architecture and design teams to influence power-aware design decisions, including power domains, gating strategies, and current demand shaping.
• Support signoff activities, including EM, IR, and reliability verification, ensuring design meets long-term reliability and manufacturability goals.
• Debug and root-cause PDN-related issues during pre-silicon and post-silicon phases, including silicon correlation and model refinement.
• Improve PDN methodologies through automation, scripting, and best-practice development across HBM programs.

Qualifications

• Strong experience in power delivery network design and analysis for complex SoCs or high-performance ASICs.
• Proficiency with EM/IR analysis tools such as RedHawk, Totem, or equivalent.
• Proficiency with Spice based simulation tools and 3D modeling of PDN networks.
• Solid understanding of IR drop, electromigration, dynamic voltage droop, and power noise mechanisms.
• Experience with physical design flows and close interaction with floorplanning, routing, and implementation teams.
• Familiarity with full RTL-to-GDSII design flow and signoff methodologies.
• Strong analytical and debugging skills with the ability to drive complex issues to closure.

Preferred Qualifications

• Experience with HBM, DRAM, or memory-centric SoC designs, including understanding of 3DIC power delivery challenges.
• Familiarity with die-package-system co-design and advanced packaging technologies (e.g., 2.5D/3D integration).
• Experience with transient and vector-based power analysis methodologies.
• Knowledge of JEDEC standards and memory subsystem behavior.
• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
• Minimum 10 years of experience in a related field.
• Proven ability to mentor and develop junior engineers.

The US base salary range that Micron Technology estimates it could pay for this full-time position is:

$146,000.00 - $297,000.00 a year

Additional compensation may include benefits, bonuses and equity.
Our salary ranges are determined by role, level, and location.The range displayed on each job posting reflects the minimum and maximum target base pay for new hire salaries of the position across all US locations.Within the range, individual pay is determined by work location and additional job-related factors, including knowledge, skills, experience, tenure and relevant education or training. The pay scale is subject to change depending on business needs.Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits.

As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits.

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

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