Hardware Qualification Engineer, Senior Staff

d-Matrix inc.; Santa Clara (CA); On-site; USD 130,000 - 160,000; Full time

Job summary

d-Matrix inc. is seeking a Senior Staff Hardware Qualification Engineer in Santa Clara, CA to lead reliability testing and qualification strategies for their AI computing platforms. The ideal candidate will have over 12 years of experience in hardware qualification, expertise in reliability standards, and the ability to manage cross-functional influences within the company. This role offers the opportunity to innovate and establish a reliability lab. The company values an inclusive culture and fosters collaboration in cutting-edge technology development.

Qualifications

• 12+ years in hardware qualification or reliability, specifically in high-performance computing.
• Expert-level experience with statistical methods like Weibull analysis.
• Mastery of IPC and Telcordia standards.

Responsibilities

• Define qualification plans for complex AI accelerator systems.
• Lead implementations of stress and reliability testing.
• Drive root-cause analysis for system-level failures.

Skills

Expert-level experience with high-speed oscilloscopes

Strong command of statistical methods

Mastery of JEDEC standards

Education

BS/MS in Electrical Engineering, Mechanical Engineering, or Reliability Engineering

Tools

High-speed oscilloscopes

Logic analyzers

Environmental chambers

Job description

Overview

At d-Matrix, we are focused on unleashing the potential of generative AI to power the transformation of technology. We are at the forefront of software and hardware innovation, pushing the boundaries of what is possible. Our culture is one of respect and collaboration. We value humility and direct communication. Our team is inclusive, and our differing perspectives allow for better solutions. We are seeking individuals passionate about tackling challenges and are driven by execution. Ready to come find your playground? Together, we can help shape the endless possibilities of AI.

Hardware Qualification Engineer, Senior Staff
Location: Santa Clara, CA (Onsite/Hybrid)

About the Role

As a Hardware Qualification Engineer, Senior Staff, you will be the final gatekeeper of quality and reliability for our next-generation AI compute platforms. This is a high-impact, technical leadership role responsible for defining the qualification strategies that ensure our hardware—from ASIC substrates to Rack scale systems — can withstand the rigorous demands of 24/7 data center environments.

You will bridge the gap between design and mass production, ensuring that "cutting edge" doesn’t mean "fragile."

Key Responsibilities

• Qualification Strategy: Define and execute comprehensive HW qualification plans (EVT/DVT/PVT) for complex AI accelerator systems, including PCIe cards, OAM modules and chassis systems.
• Stress & Reliability Testing: Lead the implementation of HALT/HASS, thermal cycling, humidity, and vibration testing to identify marginalities in high-power ASIC designs.
• Signal & Power Integrity Validation: Provide senior-level oversight for the validation of high-speed SerDes (112G/224G/PCIe), LPDDR, CoWOS designs, and complex PDN (Power Delivery Network) transients.
• Failure Analysis (FA): Drive root-cause analysis for complex system-level failures, utilizing tools like X-ray, CT scan, and SEM/EDX to distinguish between design flaws, manufacturing defects, and material fatigue.
• Interconnect Reliability: Specifically oversee the qualification of high-bandwidth interconnects (NVLink/UALink equivalents) and PCIe Gen5/6 link stability.
• Cross-Functional Influence: Work directly with Design, Thermal, and Firmware teams to implement hardware fixes based on qualification data.
• Vendor Management: Partner with CMs (Contract Manufacturers) and JDMs to align on test methodologies and production outgoing quality limits (OQL).

Required Qualifications

• Education: BS/MS in Electrical Engineering, Mechanical Engineering, or Reliability Engineering.
• Experience: 12+ years in hardware qualification or reliability, specifically with high-performance computing (HPC), servers, or networking hardware.
• Technical Depth: Mastery of JEDEC, IPC, and Telcordia standards for hardware reliability.
• Diagnostic Skills: Expert-level experience with high-speed oscilloscopes, logic analyzers, and environmental chambers.
• Statistical Proficiency: Strong command of statistical methods (Weibull analysis, DOE, and JMP/Minitab) to predict product life cycles and failure rates.

Preferred Skills

• Experience qualifying Air and Liquid Cooling components (CDUs, cold plates, leak detection) for high-TDP AI systems.
• Background in ASIC/Package-level reliability, including electromigration and Thermal Stress Analysis.
• Familiarity with Python or LabVIEW for automating complex test sequences.

The "d-Matrix" Edge

We don’t just test; we innovate. You will be working on a unique chiplet-based architecture where traditional qualification boundaries are blurred. You’ll have the opportunity to build a world-class reliability lab from the ground up and set the standard for how Digital In-Memory Computing (DIMC) is validated.

Equal Opportunity Employment Policy

d-Matrix is proud to be an equal opportunity workplace and affirmative action employer. We’re committed to fostering an inclusive environment where everyone feels welcomed and empowered to do their best work. We hire the best talent for our teams, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. Our focus is on hiring teammates with humble expertise, kindness, dedication and a willingness to embrace challenges and learn together every day.

d-Matrix does not accept resumes or candidate submissions from external agencies. We appreciate the interest and effort of recruitment firms, but we kindly request that individuals interested in opportunities with d-Matrix apply directly through our official channels. This approach allows us to streamline our hiring processes and maintain a consistent and fair evaluation of all applicants. Thank you for your understanding and cooperation.