Hardware Design Engineer (contract)

Microsoft; Fort Collins (CO); Remote; USD 100,000 - 125,000; Full time

Job summary

Join a leading company as a Hardware Design Engineer, focusing on design verification for complex IPs and sub-systems in modern FPGAs. The role involves developing test plans, running simulations, and debugging failures. Ideal candidates have extensive experience in IP level verification using UVM and SystemVerilog, and possess strong analytical and communication skills. This contract position offers a remote work option and a competitive hourly pay range.

Qualifications

• 10+ years of experience in hardware engineering design.
• Advanced knowledge of UVM and SystemVerilog.

Responsibilities

• Analyze information for project planning and execution.
• Create and modify verification environments in a UVM simulation environment.
• Build, test, and modify product prototypes.

Skills

Communication

Analytical

Problem-Solving

Team-oriented

Detail-focused

Education

Bachelor's degree in engineering

Tools

Verilog RTL programming

UVM

SystemVerilog

Job description

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Job Overview

Be part of a team working on design verification for complex IPs and sub-systems that are part of modern FPGAs. Develop and execute verification test plans for IPs and sub-systems, including: development of testbench infrastructure, testcase creation, implementing checkers, writing functional coverage and assertions, developing common/reusable verification components for reuse across teams, performing coverage analysis and closure, running simulations and regressions, triaging and debugging test failures. The ideal candidate has extensive experience in IP level verification using UVM and SystemVerilog within the last 3 years. Knowledge of AMBA AXI protocol is preferred but not required.

Responsibilities

1. Analyze information for project planning and execution.
2. Create and modify verification environments and components in a UVM simulation environment.
3. Build, test, and modify product prototypes using models or computer simulations.
4. Evaluate hardware configuration needs considering reporting formats, constraints, and security restrictions.
5. Monitor equipment functioning and modify to ensure conformance with specifications.

Requirements

1. 10+ years of experience.
2. Bachelor's degree in engineering.
3. Strong communication, analytical, and problem-solving skills.
4. Team-oriented and detail-focused.
5. Basic knowledge of Verilog RTL programming.
6. Advanced knowledge of UVM and SystemVerilog.
7. Understanding of engineering science and technology applications.
8. Knowledge of ASIC or FPGA verification.
9. Experience in hardware engineering design.

Additional Details

• Location: Remote
• Duration: 2 months
• Pay Range: $77 - $87.50 per hour
• Weekly Schedule: 40 hours

AGS is an Equal Opportunity Employer and considers all applications without discrimination based on race, gender, sexual orientation, gender identity, age, religion, veteran status, disability, or genetic information.

Job Details

• Seniority level: Mid-Senior level
• Employment type: Contract
• Job function: Engineering and IT
• Industries: Software Development