GPU Power & Performance Engineer - ASIC

Qualcomm; Austin (TX); On-site; USD 162,000 - 243,000; Full time

Job summary

Qualcomm Technologies, Inc. in Austin, TX seeks a GPU Engineer to architect, design, verify, and optimize GPU cores for high performance and low power. You will collaborate with cross-functional teams to meet customer needs and push the capabilities of next-gen devices.

The role involves exploration, power/thermal analysis, and RTL-based optimization across SOC design flows, with opportunities to influence leadership decisions and contribute to cutting-edge silicon solutions.

Qualifications

• Bachelor's degree in science/engineering or related field with strong ASIC design knowledge.
• 4+ years of GPU experience preferred.
• Experience interacting with senior leadership (Director level and above) preferred.

Responsibilities

• Technology exploration
• Power analysis and estimation
• Analyzing performance and power on use cases
• RTL and Synthesis based Power Optimization
• Thermal Analysis and Optimization
• Performance Power and Area modeling and optimization
• SOC Design implementation /methodology
• Semi-custom design flow and methodology

Skills

Power Modeling

Performance Modeling

Power Analysis

RTL and Synthesis

SystemVerilog RTL

Linux scripting (TCL, Python, Perl)

Formal Verification

Power Intent design

Clock/Power Gating

Thermal Analysis

Education

Bachelor's degree in Computer Engineering/Computer Science/Electrical Engineering or related field

Master's degree in Computer Engineering/Computer Science/Electrical Engineering or related field

PhD in Computer Engineering/Computer Science/Electrical Engineering or related field

Tools

Power Artist

PrimetimePX

Synthesis

Static Timing Analysis

Formal Verification

Linux scripting

Job description

Qualcomm Technologies, Inc. in Austin, TX seeks a GPU Engineer to architect, design, verify, and optimize GPU cores for high performance and low power. You will collaborate with cross-functional teams to meet customer needs and push the capabilities of next-gen devices.

The role involves exploration, power/thermal analysis, and RTL-based optimization across SOC design flows, with opportunities to influence leadership decisions and contribute to cutting-edge silicon solutions.