GPU Memory Hierarchy Design Engineer for SoC

Apple, Inc.; Santa Clara (CA); On-site; USD 129,000 - 195,000; Full time

Job summary

Apple Inc. in Santa Clara, California, is seeking a GPU Design Engineer to participate in micro-architecture specification and RTL coding for next-generation GPUs. You will explore performance, area, and power trade-offs, and collaborate with the verification team on functional simulations and debugging to ensure high-quality designs.

The role emphasizes creativity, dynamic problem solving, and the ability to adapt to new technical areas within a fast-moving hardware team.

Qualifications

• Experience in Verilog/SystemVerilog and HDL.
• Minimum BS degree.

Responsibilities

• Participate in micro-architecture specification and RTL coding.
• Collaborate with verification team for functional simulation and debugging.
• Demonstrate creativity in problem solving and adapt to new technical areas.

Skills

Logic design

Computer architecture

CPU architecture

Cache design

On-chip interconnect

Data compression

Shader processor

Teamwork

High performance design

Low power design

Scripting languages

Education

BS degree

Tools

Verilog

SystemVerilog

HDL

Job description

Apple Inc. in Santa Clara, California, is seeking a GPU Design Engineer to participate in micro-architecture specification and RTL coding for next-generation GPUs. You will explore performance, area, and power trade-offs, and collaborate with the verification team on functional simulations and debugging to ensure high-quality designs.

The role emphasizes creativity, dynamic problem solving, and the ability to adapt to new technical areas within a fast-moving hardware team.