GPU Design Engineer – Memory Hierarchy Job ID- 966 Job ID- 3204

MaziCTools; United States; Remote; USD 81,000 - 121,000; Full time

Job summary

Apple in Santa Clara, CA, seeks a GPU Design Engineer to contribute to micro-architecture specification and RTL coding for a next‑gen GPU memory hierarchy. You will work on high‑performance, power‑efficient designs with a focus on silicon quality and team collaboration.

You will analyze trade-offs in performance and area, partner with verification, and help deliver cutting-edge GPUs for millions of Apple devices.

Qualifications

• BS degree required
• Experience with CPU/GPU architectures or related hardware
• Strong HDL knowledge and RTL coding experience

Responsibilities

• Participate in micro-architecture specification and RTL coding
• Collaborate with verification team for functional simulation and debugging
• Explore architecture trade-offs for performance, area and power

Skills

CPU/GPU architecture

Logic design fundamentals

Cache design

On-chip interconnect

Verilog/SystemVerilog

HDL

Team communication

Education

BS degree

Tools

Verilog tools

Job description

Santa Clara,California,United States

Summary

Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Do you love working on challenges that no one has solved yet? Join us to help deliver the next groundbreaking product containing an Apple designed GPU. As part of the GPU Memory Hierarchy Design team, you'll be responsible for crafting and building a GPU that enriches the lives of millions of people every day.

Description

As a GPU Design Engineer, you will participate in micro-architecture specification and RTL coding. Explore architecture trade-offs in performance, area and power consumption. You will collaborate with verification team for functional simulation and debug. You will go beyond the industry norm and demonstrate creativity in problem solving, ability to think dynamically and outside of standard convention, and adapt quickly to new technical areas.

Key Qualifications

• Experience and knowledge of CPU or GPU architecture
• Knowledge of logic design fundamentals
• Knowledge in one or more areas of cache design, on-chip interconnect network, data compression or shader processor
• Proficiency in Verilog/System Verilog, HDL
• Understanding of high performance, low power designs
• Experience with scripting languages such as Perl, Python and Ruby is a plus
• Ability to work well in a team with strong communication skills

Education & Experience

Minimum requirement of BS degree

Pay & Benefits

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $58.61 and $88.29/hr, and your base pay will depend on your skills, qualifications, experience, and location. Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

GPU Design Engineer - Memory Hierarchy