GPU Formal Design Verification Engineer

Apple; Austin (TX); On-site; USD 100,000 - 150,000; Full time

Job summary

A leading technology company is seeking a GPU Formal Design Verification Engineer to join their Silicon Technologies group in Austin. In this role, you will ensure the high-performance and power-efficient design of next-generation processors. You will collaborate with cross-functional teams, manage verification processes, and develop automated verification flows, contributing to the seamless operation of Apple products.

Qualifications

• 3+ years of relevant experience required.
• Proficiency with formal verification tools.
• Strong collaboration skills across multiple teams.

Responsibilities

• Collaborate with the design team to review and improve specifications.
• Drive formal verification across multiple design blocks.
• Create automated verification flows and infrastructure.

Skills

Experience with CPU or GPU architectures

VLSI circuits

Digital logic design

Programming and scripting skills

Education

BSc in Computer Science, Computer Engineering, Electrical Engineering

Tools

JasperGold

IFV

Job description

GPU Formal Design Verification Engineer

Location: Austin, Texas, United States

Department: Hardware

Summary: Posted: May 19, 2025 | Role Number: 200605440

Are you passionate about creating elegant solutions for complex challenges? Join our Silicon Technologies group to help design and manufacture next-generation, high-performance, power-efficient processors and system-on-chips (SoCs). Your work will ensure Apple products and services handle tasks seamlessly, delighting millions. Be part of a team that crafts the technology powering Apple’s devices, enabling users to do what they love!

The Graphics Verification Engineer will focus on pre-silicon RTL verification using formal and property checking methods. This role requires a deep understanding of micro-architectural details and how your block integrates within the broader GPU design.

Responsibilities

1. Collaborate with the design team to review and improve specifications.
2. Develop verification plans with input from design, verification leads, and micro-architects.
3. Drive formal verification across multiple design blocks to completion.
4. Conduct verification reviews with cross-functional teams.
5. Manage deliverables and support product requirements through collaboration.
6. Create automated verification flows and infrastructure.
7. Coordinate with other engineers to ensure seamless verification processes.

Minimum Qualifications

• BSc in Computer Science, Computer Engineering, Electrical Engineering, or related field, with 3+ years of relevant experience.
• Experience with CPU or GPU architectures, VLSI circuits, and digital logic design.
• Proficiency with formal verification tools like JasperGold, IFV, etc.
• Programming and scripting skills.

Preferred Qualifications

• Experience with HDLs such as Verilog/SystemVerilog and SVA.
• Knowledge of formal verification of pipelined micro-architectures, MMUs, cache coherency.
• Familiarity with abstraction techniques and formal verification technologies.
• Ability to interpret design specifications and review formal verification results.
• Experience with academic formal verification tools and constrained random verification methods.
• Strong collaboration skills across multiple teams.

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