Graphics Cache Hierarchy Design Verification Engineer

Apple Inc.; Santa Clara (CA); Hybrid; USD 150,000 - 278,000; Full time

Job summary

Apple Inc. in Santa Clara, CA, is seeking a Graphics Cache Hierarchy Design Verification Engineer to lead pre-silicon RTL verification of graphics memory subsystems.

The role involves designing verification plans, building test benches, and creating automated verification flows to ensure robust GPU design verification. The successful candidate will have a strong background in computer architecture, SystemVerilog, and verification methodologies, and will collaborate closely with design leads and

Qualifications

• BS in related field and 3+ years of experience.
• Experience in CPU or GPU architecture.
• Experience with SystemVerilog and HDL simulators.

Responsibilities

• Develop verification plans in coordination with design leads and architects.
• Build and maintain portable verification test bench components and environments.
• Generate directed and constrained random tests.
• Run simulations and debug design and environment issues.
• Create functional coverage points, analyze coverage, and improve test environment to target coverage holes.
• Create automated verification flows for block verification.
• Apply knowledge of hardware description languages (VHDL/Verilog) to verify complex designs.
• Work with other block, memory subsystem and core level engineers to ensure seamless verification flow.

Skills

CPU or GPU architecture

Bring-up & debug

SystemVerilog

Education

BS in related field

Tools

HDL simulators

Waveform viewers

UVM

Perl

Ruby

Shell scripting

Makefiles

Job description

Graphics Cache Hierarchy Design Verification Engineer

Santa Clara, California, United States Hardware

Do you love creating elegant solutions to highly complex challenges? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices. The Graphics Cache Hierarchy Verification Engineer will be responsible for the pre-silicon RTL verification of graphics memory subsystem units including Caches, Memory Management Unit, Interconnects and Link interface units. This includes deep understanding of the micro-architectural details of their block and how it works within the broader GPU design. A strong computer architecture background, and a solid foundation in verification methodology is required.

Description

In this role you will:- Develop verification plans in coordination with design leads and architects.- Build and maintain portable verification test bench components and environments.- Generate directed and constrained random tests.- Run simulations and debug design and environment issues.- Create functional coverage points, analyze coverage, and improve test environment to target coverage holes.- Create automated verification flows for block verification.- Apply knowledge of hardware description languages (VHDL/Verilog) to verify complex designs.- Work with other block, memory subsystem and core level engineers to ensure seamless verification flow.

Minimum Qualifications

• Experience in CPU or GPU architecture.
• Experience with driving bring up and debug of complex designs.
• Experience with verification languages such as SystemVerilog.
• Experience with HDL simulators and waveform viewers.
• BS + minimum of 3 years of experience.

Preferred Qualifications

• Strong fundamental software and programming skills.
• Experience with cache verification and memory subsystem testing highly desired.
• Understanding of the Graphics Pipeline a plus.
• Experience defining and executing unit level test plans.
• Experience with common verification methodologies such as UVM.
• Experience defining coverage space, writing coverage and coverage closure.
• Experience with Perl, Ruby, Shell scripting, Makefiles.

The base pay range for this role is between $150,400 and $277,600, and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant

At Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.

Learn about accessibility in Apple’s workplace

Learn about reasonable accommodations for job applicants

Apple accepts applications to this posting on an ongoing basis.