FPGA Software Engineer - C++/Python & Data Models

altera; San Jose (CA); On-site; USD 149,000 - 216,000; Full time

Job summary

Altera is a leading provider of programmable solutions, focused on AI-driven, software-first FPGA development and scalable hardware technologies. The DBIT team bridges hardware and software to model devices inside Quartus and power state-of-the-art algorithms and data structures.

We seek a seasoned software engineer to design lightweight, scalable data models for FPGA architectures and to collaborate across hardware and software teams on next-generation devices and tooling for bring-up and

Qualifications

• Bachelor's degree in Computer Science, computer engineering or related fields with 6+ years of experience; OR
• Master's Degree in Computer Science, computer engineering or related fields with 4+ years of experience; OR
• Ph.D. degree in Computer Science, computer engineering or related fields with 8+ years of experience.

Responsibilities

• Using C++ and Python to specify, implement and maintain software data models to represent FPGA devices.
• Developing high-performance APIs to streamline access to FPGA device databases for synthesis, placement, routing, timing analysis, power analysis, among others.
• Collaborating with multiple hardware and software teams while bringing the next-generation FPGA devices to Quartus.
• Developing tools to aid/enhance Altera’s FPGA device bring-up processes.

Skills

C/C++

Python

Communication skills

Education

Bachelor's degree in CS/CE or related fields

Master's degree in CS/CE or related fields

Ph.D. in CS/CE or related fields

Job description

Altera is a leading provider of programmable solutions, focused on AI-driven, software-first FPGA development and scalable hardware technologies. The DBIT team bridges hardware and software to model devices inside Quartus and power state-of-the-art algorithms and data structures.

We seek a seasoned software engineer to design lightweight, scalable data models for FPGA architectures and to collaborate across hardware and software teams on next-generation devices and tooling for bring-up and