FPGA Prototyping Debug and Runtime Infrastructure Development Engineer

Siemens EDA (Siemens Digital Industries Software); Wilsonville (OR); Hybrid; USD 90,000 - 162,000; Full time

Benefits offered by this job

Hybrid work model

Job summary

Siemens EDA in Wilsonville, Oregon is seeking an FPGA Hardware Design Engineer to join the prototyping R&D team. You will work on design, verification, and integration of RTL IP for our FPGA prototyping software and hardware platform.

You will implement IP blocks in Verilog/SystemVerilog, validate with simulations and real FPGA boards, and optimize timing and performance constraints using Xilinx Vivado and Intel PSG Quartus. Travel to sites may be required.

Qualifications

• BSEE or BSCE degree required.
• Proficiency in RTL design and FPGA/IP integration.
• Experience with Verilog/SystemVerilog and VHDL.

Responsibilities

• Design, implement, and maintain IP blocks in Verilog.
• Validate with simulation and FPGA boards.
• Develop and test related software components.
• RTL synthesis with timing constraints and flows.
• Provide customer support for deployed features.

Skills

RTL design

SystemVerilog/Verilog

VHDL

FPGA implementation

Vivado/Quartus

Python

C/C++

Linux

IP reuse

Debugging & timing

Education

BSEE or BSCE

Tools

Xilinx Vivado

Intel PSG Quartus

FPGA hardware boards

Job description

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design.

FPGA Hardware Design Engineer

Siemens is a global powerhouse focusing on the areas of electrification, automation and digitalization. One of the world’s largest producers of energy-efficient, resource-saving technologies, Siemens is a leading supplier of systems for power generation and transmission as well as medical diagnosis. In infrastructure and industry solutions the company plays a pioneering role. Siemens DISW is the world leader in the Electronic Design Automation (EDA) market. Our company offers software and hardware design solutions that enable companies to quickly develop leading-edge electronic products by optimizing their costs and performance. Mentor Graphics was acquired by Siemens in 2017. With the widest range of products in the industry, Mentor Graphics is the only company in the EDA market to offer an integrated software solution. Its subsidiary, based in Wilsonville Oregon, develops proprietary technologies to reduce the time needed to design integrated circuits and SoC (prototyping, validation and debugging). As part of its development, the company wishes to strengthen the R&D team by integrating a FPGA prototyping debug and runtime infrastructure development engineer.

Position Overview

Exciting opportunity in Mentor's FPGA Prototyping R&D team. The Wilsonville team focuses on debug infrastructure and hardware platform infrastructure support for Mentor’s FPGA prototyping software system and hardware platform. As a contributing engineer, you will participate in the design, specification, implementation, test, and maintenance of software and FPGA RTL hardware IP for our products.

Specific technical responsibilities include

• Design, implementation and maintenance of IP blocks in Verilog
• Validation and testing using simulation and FPGA hardware boards
• Development and testing of related software components
• RTL synthesis with timing and physical constraints, capacity and performance goals - Specifically, executing Xilinx Vivado and Intel PSG Quartus flows
• Hardware system performance analysis, debug and tuning
• Customer support to ensure smooth deployment of developed features

The candidate should be a self-motivated team player who is skilled and productive at quality-oriented and performance-oriented software and hardware engineering. The candidate will work in a world-wide distributed team. Some periodic travel to R&D or customer sites is expected in future (when Covid-19 pandemic conditions ease).

Education

• BSEE or BSCE

Skills

• RTL design with SystemVerilog, Verilog, or VHDL
• ASIC and/or FPGA implementation and flows (synthesis, place & route)
• Experience with Xilinx Vivado or Intel PSG Quartus flows
• RTL IP, Xilinx Vivado IP, Intel PSG Quartus IP, and design reuse
• RTL simulation, verification, debug, and timing analysis
• Programming languages C/C++ and Python
• Data structures and algorithms
• Linux OS

Why us?

Working at Siemens Software means flexibility - Choosing between working at home and the office at other times is the norm here. We offer great benefits and rewards, as you'd expect from a world leader in industrial software. A collection of over 377,000 minds building the future one day at a time in over 200 countries. We're dedicated to equality, and we welcome applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit, and business need. Bring your curiosity and creativity and help us shape tomorrow!

Siemens Software.

Transform the Everyday with Us

90,000 162,000 3-5%