FPGA Embedded Software Engineer – Zynq MPSoC/Linux

National Radio Astronomy Observatory

Charlottesville (VA)

On-site

USD 114,000 - 138,000

Full time

14 days+

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Benefits offered by this job

Excellent paid time off
Medical, dental and vision plans
Retirement benefit 10% of base pay

Job summary

National Radio Astronomy Observatory (NRAO) in Charlottesville, VA seeks an experienced Embedded Software FPGA Design Engineer to join the Central Development Laboratory. The role focuses on digital correlator development for next‑generation telescopes, advancing radio astronomy instrumentation and international collaborations.

Responsibilities include embedded Linux software design and verification using AMD Xilinx Vitis, Python, and BSPs; collaborating with a cross‑functional team; and solving

Qualifications

  • Bachelor's degree in Electrical Engineering/Computer Science.
  • Minimum 5 years of embedded software programming in processor-based FPGA devices.
  • Experience with AMD Zynq UltraScale+ MPSoC PS architecture.
  • Experience with Embedded Linux OS (PetaLinux/Yocto) and application code.

Responsibilities

  • Perform embedded Linux software design, implementation, simulation, and verification.
  • Research and solve complex technical issues with minimal supervision.
  • Develop embedded application code using the AMD/Xilinx Vitis tool flow and Python.
  • Work well in a team environment.

Skills

Zynq MPSoC/ RFSoC
Embedded Linux
Vitis Tool Flow
PetaLinux/ Yocto
Board Support Package
Python

Education

Bachelor's degree in Electrical Engineering/Computer Science

Tools

PetaLinux
Yocto
Vitis BSP
BSP

Job description

National Radio Astronomy Observatory (NRAO) in Charlottesville, VA seeks an experienced Embedded Software FPGA Design Engineer to join the Central Development Laboratory. The role focuses on digital correlator development for next‑generation telescopes, advancing radio astronomy instrumentation and international collaborations.

Responsibilities include embedded Linux software design and verification using AMD Xilinx Vitis, Python, and BSPs; collaborating with a cross‑functional team; and solving

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