FPGA Design Engineer

CHIPTON-ROSS Inc.

Littleton (CO)

On-site

USD 80,000 - 120,000

Full time

14 days+

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Job summary

CHIPTON-ROSS Inc. is looking for an FPGA Design Engineer for a contract position in Littleton, Colorado. The role requires substantial experience in ASIC and FPGA verification, including modern methodologies like UVM, OVM, or VMM.

The ideal candidate will possess an active DoD Secret clearance and a strong background in SystemVerilog. Responsibilities include supporting various stages of design and documentation and working with verification teams to ensure design integrity.

Qualifications

  • 3+ years of professional experience in FPGA/ASIC design.
  • Experience in developing unique verification plans.
  • Ability to present technical reviews to customers.

Responsibilities

  • Support ASIC and FPGA development phases including architecture and design.
  • Document verification plans and results.
  • Collaborate with verification teams to debug issues.

Skills

ASIC/FPGA verification experience
Active DoD Secret clearance
Familiarity with UVM, OVM, or VMM
SystemVerilog experience
Linux-based high-performance computing

Education

Accredited HSD/GED

Job description

Chipton-Ross is seeking an FPGA Design Engineer for a contract opportunity in Littleton, CO.

BASIC QUALIFICATIONS (REQUIRED SKILLS/EXPERIENCE)
  • ASIC/FPGA verification experience with modern verification methodologies such as UVM, OVM or VMM.
  • 3+ years professional experience.
  • Active DoD Secret clearance.
POSITION RESPONSIBILITIES
  • Support other aspects of ASIC and FPGA development such as architecture, design, analysis, and test.
  • Support technical reviews and be able to present to internal and external customers.
  • Devise a unique verification plan for a given design.
  • Use SystemVerilog and Universal Verification Methodology (UVM) to verify a design in a Linux-based high-performance computing environment.
  • Document verification plan and results.
  • Work with an independent verification team to resolve bugs found in the design.
REQUIRED EDUCATION
  • Accredited HSD/GED
WORK HOURS

Full-Time

5/40 work schedule

1st Shift

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