FPGA/ASIC Hardware Engineer Intern — Mentored Project

Janestreet; New York (NY); On-site; USD 55,104 - 82,656; Full time

Job summary

Jane Street in New York invites you to join our hardware internship program. You will be paired with full-time mentors and work on real projects we need completed, gaining practical experience in RTL design using OCaml and Hardcaml.

You’ll explore FPGA and ASIC toolchains, learn to test and validate hardware designs, and contribute to a range of hardware-focused efforts while developing problem-solving and collaboration skills.

Qualifications

• Familiar with a hardware description or construction language.
• Experience with FPGA/ASIC vendor tools for design and testing.
• Interest in using FPGAs/ASICs in networking contexts.
• Willingness to learn OCaml and the Hardcaml framework.

Responsibilities

• Work on real hardware design projects under mentorship.
• Develop hardware using OCaml & Hardcaml for RTL and testing.
• Gain exposure to FPGA/ASIC toolchains and workflows.

Skills

OCaml

HDL familiarity

FPGA/ASIC tooling

Hardware project experience

Networking interest

Tools

Vivado

Quartus

Genus

Innovus

Hardcaml

Job description

Jane Street in New York invites you to join our hardware internship program. You will be paired with full-time mentors and work on real projects we need completed, gaining practical experience in RTL design using OCaml and Hardcaml.

You’ll explore FPGA and ASIC toolchains, learn to test and validate hardware designs, and contribute to a range of hardware-focused efforts while developing problem-solving and collaboration skills.