Firmware Engineer Tech Lead

Asteralabs; San Jose (CA); On-site; USD 160,000 - 200,000; Full time

Job summary

Astera Labs is seeking a Firmware Engineer Tech Lead to architect and develop firmware and microcontroller subsystems for its SoC and systems products. You will ensure firmware is on par with hardware and often engage with customers to understand their needs.

You're expected to have 5+ years building firmware for complex SoCs, strong C/C++ and Python skills, and experience with BMC software, PCIe/SerDes interfaces, and embedded SDKs. The role is based in San Jose, CA with US work authorization.

Qualifications

• Bachelor’s in EE or CS required; Master’s preferred.
• 5+ years with SoC/silicon products for server/storage/networking.
• Experience with on‑chip microcontrollers and BMC SDKs.
• Ability to architect HW/SW interfaces and work with customers.

Responsibilities

• Architect and develop firmware subsystems for Astera Labs’ SoC and systems products.
• Implement major differentiating firmware features and align with hardware.
• Collaborate with design, validation, and customer-facing activities.
• Engage with customers to understand needs and deliver solutions.

Skills

Firmware development

Cross-functional collaboration

Customer-facing

Prioritization

Self-motivated

Python

C language

Education

Bachelor’s in EE or Computer Science

Master’s degree preferred

Tools

gcc/Make

Doxygen

GitHub

Job description

Astera Labs (NASDAQ: ALAB) provides rack‑scale AI infrastructure through purpose‑built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor‑based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end‑to‑end scale‑up, and scale‑out connectivity. The company’s custom connectivity solutions business complements its standards‑based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.

Role Overview

The mission of this role is to architect and develop firmware and microcontroller subsystems for Astera Labs’ SoC and systems products. As a Firmware Engineer Tech Lead you are responsible for implementing the major differentiating features of Astera Labs’ products. As such, firmware is considered equally important to the hardware, and the firmware team is often customer‑facing accordingly to ensure the needs of the customer are fully comprehended.

Basic Qualifications

• Strong academic and technical background in electrical engineering. At a minimum, a Bachelor’s in EE or Computer Science is required, and a Master’s is preferred.
• Minimum 5 years’ experience supporting or developing complex SoC/silicon products for Server, Storage, and/or Networking applications.
• Experience developing firmware to execute in on‑chip microcontrollers as well as C‑language software development kits (SDKs) to execute on system management controllers (e.g. BMC).
• Experience working with logic designers to architect and verify HW‑SW interfaces on complex SoCs.
• Professional attitude with the ability to prioritize a dynamic list of multiple tasks, to plan and prepare for customer meetings in advance, and to work with minimal guidance and supervision.
• Entrepreneurial, open‑minded behavior and can‑do attitude. Think and act fast with the customer in mind!
• Authorized to work in the US and start immediately.

Required Experience

• Experience working on PCIe‑Express (Gen‑3 and above) protocol, including working with analyzers and exercisers to debug protocol issues.
• High level of proficiency in C (preferred) or C++, including development of C‑based SDKs.
• High level of proficiency in Python for automating pre‑processors/post‑processors and FW QC.
• Working knowledge of software/firmware build environments, gcc/Make, Doxygen, and GitHub.
• Familiarity with SoC interfaces to common IP blocks such as PCIe Controllers, DDR Controllers, NVME Controllers, AMBA/AHB interfaces, on‑chip memory interfaces, and other similar interfaces.

Preferred Experience

• Experience with PAM4 SerDes with working knowledge of Tx/Rx equalization, adaptation, CDR and SerDes link budgets.
• Hands‑on experience with PCIe devices in Server, Storage, and/or Networking equipment.
• Experience developing embedded firmware for PCIe or Ethernet Switch products.

Base salary range is $160,000 to $200,000 depending on experience, level, and business need. This role is eligible for discretionary bonus, incentives and benefits.

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non‑binary people, veterans, parents, and individuals with disabilities.