Firmware Engineer II

Cadence Design Systems; Austin (TX); On-site; USD 110,000 - 160,000; Full time

Job summary

Cadence Design Systems is seeking an embedded firmware engineer to join the DDR PHY IP Front End Design team in Austin. You will develop firmware for DDR5 PHY using microcontrollers and create low-level APIs for high-speed memory interfaces.

You will collaborate with hardware designers and verification teams to co-verify firmware against RTL simulations and on silicon bring-up boards, applying C, scripting and debugging skills in a fast-paced environment.

Qualifications

• Strong C programming for embedded software
• Bare-metal firmware development experience
• Knowledge of DDR5 JEDEC specs and DIMM configurations
• Scripting in Shell/Perl/Python/TCL for tooling
• Experience with RTL simulations and firmware co-verification

Responsibilities

• Develop firmware for DDR5 PHY using microcontrollers
• Develop bare-metal firmware and low-level APIs
• Collaborate with hardware designers to derive training algorithms
• Co-verify firmware-hardware with verification team
• Debug firmware in RTL simulations and on silicon bring-up boards

Skills

C programming

Embedded firmware

DDR5 knowledge

Shell/Perl/Python/TCL scripting

Verilog/VHDL debugging

EDA tools for verification

Tools

Verilog

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Description

Be part of the Cadence DDR PHY IP Front End Design team responsible for -

• Develop firmware for DDR5 PHY using microcontrollers


• Developing firmware in C typically involving bare-metal programming and developing low-level APIs on Microcontrollers.


• Responsible for collaborating with hardware designers and memory subsystem architects to derive training algorithms and implement them.


• Responsible for collaborating with the verification team to deduce firmware-hardware co-verification plan.


• Develop and Debug firmware in RTL based hardware simulations (C +Verilog simulations)


• Develop and Debug on Silicon bring-up boards.

Required Skills:

• Good Knowledge of DDR5 JEDEC spec, knowledge of different DIMM configurations and specifications.


• Relevant experience in developing bare-metal firmware for High-speed SerDes or Memory interface Physical Layer blocks.


• Good Knowledge of C programming language for embedded software development and use of relevant IDE.


• Comfortable debugging RTL simulations involving firmware and microcontroller subsystem.


• Good knowledge of Shell/Perl/Python/TCL scripting


• Good experience on Verification EDA Tools like simulators and waveform viewers

We’re doing work that matters. Help us solve what others can’t.