Fab Process Engineering Lead, Raxium

Google; Fremont (CA); On-site; USD 236,000 - 329,000; Full time

Job summary

Google's Raxium display group in Silicon Valley seeks a Fab Process Engineering Lead to oversee GaN-on-Si micro LED fabrication. You will define priorities, mentor engineers, and drive manufacturing excellence in a cutting-edge display program.

The role emphasizes process robustness, cross-functional collaboration, and executive-level communication to advance next-generation display technology.

Qualifications

• Master's degree or equivalent practical experience in a related field.
• 10 years of semiconductor process engineering experience in wafer fab manufacturing.
• 7 years of technical leadership experience.

Responsibilities

• Own select process engineering areas and ensure smooth transitions from concept to manufacturing.
• Drive the wafer fab roadmap and KPI delivery through process innovation and tool installations.
• Apply SPC, FMEA, and RCA to remove bottlenecks and improve lithography/etch stability.
• Serve as the primary technical liaison for fab operations, upholding safety and quality standards.
• Develop and mentor an engaged engineering team through performance management.

Skills

Semiconductor process engineering

Technical leadership

Patterning and lithography

Education

Master's degree in Electrical Engineering, Physics, Materials Science, Chemistry or related field

Job description

Minimum qualifications:

• Master's degree in Electrical Engineering, Physics, Materials Science, Chemistry or a related field or equivalent practical experience.
• 10 years of experience in semiconductor process engineering in semiconductor wafer fab manufacturing (e.g., patterning and lithography, wafer bonding and CMP, wet chemical processes, plasma processing, etc.).
• 7 years of technical leadership experience.

Preferred qualifications:

• Ph.D in Electrical Engineering, Physics, Materials Science, Chemistry or a related or field equivalent practical experience.
• Black belt of six sigma practitioner.
• 15 years of experience in semiconductor process engineering in high-volume semiconductor wafer fab manufacturing.
• Experience in device fabrication and process integration of semiconductor optoelectronics devices.
• Fab technical leadership experience defining the process robustness strategy and execution, managing engineering cross-functions, influencing senior stakeholders, and managing executive communication.
• Expertise in structured problem-solving, data query and analysis.

About The Job

As a Fab Process Engineering Lead, you will be joining our talented team in Silicon Valley. Raxium's technology is based on GaN-on-Si micro LEDs, with more demanding process requirements than found in typical LED fabs, with an installed equipment set to meet those needs.

You will select, motivate, set priorities, develop and manage the individual performance to ensure functional excellence and engaged team members. You'll contribute to the innovation behind products loved by billions worldwide and be a part of a team as we develop a truly novel display technology.

Google's Raxium display group has established a revolutionary semiconductor materials display technology that enables new functionality in display products, bringing to users a closer and more natural linkage between the digital and physical realms in applications such as augmented reality (AR) and light-field display. With startup roots and a state-of-the-art compound semiconductor fab in Silicon Valley, Raxium is seeking to build upon its engineering team with an aim to disrupt next-generation display markets.

Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

US: $236000 - $329000 (USD) + 25% bonus target + equity + benefits

Responsibilities

Learn more about benefits at Google.

• Own select process engineering areas, ensuring seamless transitions from proof-of-concept to manufacturing, which is now underway. Specific module responsibilities will be dependent on your experience and skillset.
• Drive the strategic wafer fab roadmap and deliver key performance indicators (KPIs) by overseeing process innovation, new tool installations and process capability enhancements. Implement equipment and process optimization to maximize production efficiencies and optimize wafer output.
• Utilize statistical process control (SPC), failure mode and effect analysis (FMEA) and structured problem-solving (RCA) to eliminate systemic bottlenecks and enhance lithography and etch module stability.
• Act as the primary technical liaison for fab operations, ensuring all safety, quality, and manufacturability standards are surpassed.
• Cultivate an engaged, engineering team through proactive performance management and talent development.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.