Entry-Level ASIC Verification Engineer — Equity Eligible

NVIDIA; Austin (TX); On-site; USD 108,000 - 184,000; Full time

Benefits offered by this job

Competitive salaries

Generous benefits package

Equity

Job summary

A leading technology company is seeking an ASIC Design Verification Engineer - New College Grad 2026 to join their team in Austin, Texas. This entry-level position involves designing and maintaining verification environments and developing test plans for cutting-edge technology. Candidates should have an MS in Computer or Electrical Engineering and experience with System Verilog, UVM, and Python. NVIDIA offers competitive salaries and a comprehensive benefits package.

Qualifications

• Completion of MS or higher in Computer or Electrical Engineering.
• Experience with System Verilog, UVM, and OOPs programming.
• Strong coding skills in Python or other scripting languages.
• Good understanding of computer architecture fundamentals.

Responsibilities

• Design and maintain the unit level/sub-system Verification environment.
• Develop and carry out the test plan to verify the design.
• Create UVM components, sequences, and tests.
• Launch regressions, resolve issues, and meet DV milestone targets.
• Collaborate with architects and software engineers to achieve project goals.

Skills

System Verilog

UVM

Python

RTL design (Verilog)

Education

MS or higher in Computer or Electrical Engineering

Tools

VCS

Verdi

Job description

A leading technology company is seeking an ASIC Design Verification Engineer - New College Grad 2026 to join their team in Austin, Texas. This entry-level position involves designing and maintaining verification environments and developing test plans for cutting-edge technology. Candidates should have an MS in Computer or Electrical Engineering and experience with System Verilog, UVM, and Python. NVIDIA offers competitive salaries and a comprehensive benefits package.