Embedded Software Engineer

Harvey Nash; Redmond (WA); On-site; USD 83,000 - 96,000; Part time

Job summary

Harvey Nash is seeking a Software Development Engineer III for a 9+ month contract in Redmond, WA. You will bring up AMD Versal SoCs on a custom board, develop BSPs and drivers for PS subsystems, and validate PL integration with AXI interfaces.

Required: 3+ years of embedded software experience, Yocto, C/C++, and experience with AMD/Xilinx toolchains (Vivado, Vitis). Familiarity with Versal boot architecture is a plus; relocation not specified.

Qualifications

• 3+ years of embedded software experience required.

Responsibilities

• Bring up the AMD Versal SoC on the custom board using EVK as reference.
• Develop BSP and drivers for Versal PS subsystems (APU/RPU).
• Validate PL integration, IP instantiation, and AXI interfaces.
• Migrate Vivado toolchain from 2024.2 to 2026.1/2026.2.
• Collaborate with AMD/Xilinx on Versal platform tools (Vivado, Vitis, Yocto, EDF).

Skills

Embedded software

Vessel bring-up

C/C++

Yocto

Versal boot

AMD Xilinx toolchain

Python

Rust

Debugging

AXI interfaces

Tools

Vivado

Vitis

EDF

Job description

We are seeking a Software Developer Level 3 with expertise in AMD Versal SoCs and AMD tooling to drive board bring-up and migrate our designs to the Vivado 2026.1 toolchain first, then update to 2026.2 when it becomes available.

Here are some of the specific details:

Job Title: Software Development Engineer III

Job Duration: 9+ months

Job Location: Redmond, WA

REQUIRED SKILLS:

• The position requires 3+ years of embedded software development experience with hands-on vessel bring-up expertise.
• Essential technical skills include experience with Yocto and AMD/Xilinx SDK tool chain, proficiency in C/C++ (Python or Rust as additional languages), and hardware/software debugging capabilities.
• Candidates should have detailed understanding of vessel boot architecture, though some flexibility exists on this requirement.
• Detailed understanding of Versal boot architecture.
• Bring up the AMD Versal SoC on our custom board, using the EVK as the reference design.
• Develop the BSP and drivers for Versal PS subsystems (APU and RPU).
• Validate PL integration and peripherals, including IP instantiation, configuration, and AXI interfaces.
• Work with AMD and Xilinx on Versal platform tools (Vivado, Vitis, Yocto, and EDF).
• Migrate Vivado toolchain from v2024.2 to v2026.1/v2026.2

A reasonable, good faith estimate of the minimum and maximum for this position is $60/hr to $70/hr on w2.