Electrical/Optical SerDes Analog Mixed Signal Design Engineer

MediaTek; Irvine (CA); On-site; USD 150,000 - 301,000; Full time

Benefits offered by this job

Comprehensive health insurance

Life and disability insurance

401(k) plan

Parental leave

Job summary

MediaTek is seeking candidates in Irvine, California, for an electrical and optical transceiver design role aimed at next-generation data centers. The ideal candidate should have a Master's or PhD in Electrical Engineering or Applied Physics, alongside strong skills in high-speed analog CMOS circuit design and silicon photonic devices. The position offers a competitive salary ranging from $150,000 to $301,000 and comprehensive health benefits including a 401(k) plan and parental leave.

Qualifications

• Proficient in modeling and signal processing using MATLAB/Python.
• Solid background in high-speed analog CMOS circuit design.
• Hands-on experience with silicon photonic devices and electro-optic transceivers.

Responsibilities

• Design and verification of high-speed analog and mixed-signal circuits.
• Architecture study of advanced high-speed link topologies.
• Collaborate on DSP and algorithm teams for TX/RX equalization.

Skills

High-speed analog CMOS circuit design

Deep-submicron/FinFET process technology

Silicon photonic devices

Electro-optic transceivers

Cadence design environment

Modeling in MATLAB/Python

Education

MS or PhD in EE, Applied Physics or related field

Tools

MATLAB

Python

Job description

Job Description

The Interconnect Solutions team is searching for qualified candidates to join our fast‑growing team. As a member of this dynamic team, you will work on state‑of‑the‑art next‑generation electrical and optical transceivers for data centers serving cloud infrastructure as well as the growing field of AI and high‑performance computing. We are looking for ambitious analog and mixed‑signal designers with exposure to silicon photonics and electro‑optic systems who are willing to learn, grow, and contribute to a diverse portfolio of high‑speed interconnect products.

• Architecture study and evaluation of advanced high‑speed SerDes and optical transceiver topologies targeting 100G/lane PAM4 and beyond, including EIC/PIC partitioning and link‑budget definition.
• Design and verification of high‑speed, high‑performance analog and mixed‑signal circuits including, but not limited to: modulator drivers (MRM/MZM/EAM), TIAs, front‑end circuits, samplers, comparators, ADCs, DACs, PLLs, CDRs, clock distribution, heater drivers, and bias DACs.
• Electro‑optic system modeling and co‑simulation with PIC designs, including behavioural modeling of photonic devices (MRM, MZM, EAM, PD, heaters, laser sources) in Verilog‑A, MATLAB, or Python.
• Collaborate with package and SI/PI teams to define and sign off EIC‑to‑PIC interface, bump map, and supply distribution for co‑packaged and advanced‑packaging contexts.
• Partner with DSP and algorithm teams on TX/RX equalization partitioning (analog CTLE/FFE/DFE vs. digital DSP) and link adaptation.
• Evaluate, measure, and debug silicon with firmware and test teams through bring‑up and post‑silicon validation until it reaches high‑volume production.

Main Requirements and Qualifications

• MS or above with a major in EE, Applied Physics, or a related field; PhD preferred.
• Solid background in high‑speed analog CMOS circuit design in advanced process nodes.
• Good understanding of deep‑submicron/FinFET process technology.
• Familiarity with serial links, wireline transceivers, or optical transceiver design and verification.
• Hands‑on experience with silicon photonic devices or electro‑optic transceivers: MRMs, MZMs, EAMs, PDs, grating couplers, heaters, lasers, etc.
• Understanding of optical transceiver design and system‑level requirements, including OMA, ER, TDECQ, RLM, BER, FEC, RIN, shot noise, chirp, dispersion, and optical nonlinearity.
• Proficient with Cadence design environment and mixed‑signal simulation.
• Proficient in MATLAB and/or Python for modeling, signal processing, and design automation.
• Able to assume responsibility for a variety of technical tasks and to work independently.
• Excellent working attitude and good interpersonal and communication skills.
• Preferred Qualifications:
• Experience developing behavioural or compact models of photonic devices (MRM, MZM, EAM, PD) in Verilog‑A/Verilog‑AMS for mixed‑signal co‑simulation.
• Experience with Lumerical (INTERCONNECT/FDTD/MODE).
• Exposure to CPO or pluggable optical transceiver architectures, thermal/wavelength control loops, and hardware/firmware partitioning of calibration and tracking.
• Experience with PIC‑level design and integration using foundry photonic PDKs.
• Experience with lab bring‑up of high‑speed or electro‑optic silicon.

Salary and Benefits

• Salary range: $150,000–$301,000.
• Employee may be eligible for performance bonus, short‑ and long‑term incentive programs.
• MediaTek provides a variety of benefits including comprehensive health insurance coverage, life and disability insurance, savings plan, company‑paid holidays, sick leave, vacation time, parental leave, 401(k) and more.

Equal‑Employment Opportunity Statement

MediaTek is an Equal Opportunity Employer that is committed to inclusion and diversity to all, regardless of age, ancestry, color, disability (mental and physical), exercising the right to family care and medical leave, gender, gender expression, gender identity, genetic information, marital status, medical condition, military or veteran status, national origin, political affiliation, race, religious creed, sex (includes pregnancy, childbirth, breastfeeding and related medical conditions), and sexual orientation.