Electrical/Optical Interconnect Communication System Design Engineer

MediaTek Research Lab Inc.; Irvine, Northern (CA, KY); Hybrid; USD 188,000 - 301,000; Full time

Job summary

MediaTek Research Lab Inc. in Irvine, CA is seeking an Electrical/Optical Interconnect Communication System Design Engineer to lead architecture, modeling, and specification of high-speed interconnect solutions for computing platforms.

The role requires strong DSP, coding theory, and system modeling skills, with MS in EE/CS; you will work with MATLAB/Python/C++ to evaluate performance, power, and area, collaborating with global teams.

Qualifications

• Experience with DSP, coding theory, and high-speed interconnects.
• Proficiency in MATLAB, Python, or C++ for system modeling.
• MS or higher in EE, CS, or related field.

Responsibilities

• Develop algorithms for high-speed wireline systems.
• Model algorithms in MATLAB, Python, or C++.
• Optimize performance, power, area, and latency.

Skills

DSP & coding

MATLAB/Python/C++

Error-correction coding

Analog/RTL design

Team communication

Education

MS in EE/CS

Tools

MATLAB

Python

C++

Job description

Electrical/Optical Interconnect Communication System Design Engineer

Category

Algorithm & Architecture

Location

Irvine, CA

Experience

More than 2 Years Work Expe.

Job Description

We are seeking an Interconnect Communication System Design Engineer to lead the architecture, modeling, and specification of high-speed interconnect solutions. In this role, you will define system-level requirements, develop physical layer algorithms, and ensure robust performance, power, and area efficiency across various wireline standards (e.g., Ethernet, PCIe) under challenging channel conditions. This position is critical for enabling next generation high-speed connectivity in computing platforms.

The position is open for both Irvine, CA and San Jose, CAJob Description

Job Description

• Develop advanced algorithms and architectures for high-speed electrical/optical wireline communication systems.
• Model the algorithms in MATLAB, Python, or C++ for performance evaluation.
• Optimize algorithms and architectures for performance, power, area, and latency.
• Collaborate with worldwide design teams and provide support for bit-true, cycle-true modeling, design verification, and post-silicon validation.
• Conduct advanced research and development in future wireline communication areas.

Main Requirements and Qualifications

• Deep understanding of digital signal processing (DSP), error-correction coding, and communication theory.
• Proficiency in MATLAB, Python, or C++ for system modeling.
• Experience with CDR, equalization, compensation, cancellation, sequence detection, and block or convolutional error-correction coding in electrical or optical systems is a plus.
• Experience with analog circuit design or RTL design is a plus.
• Team player with strong communication skills.
• M.S. or higher degree in EE/CS or a related field.
• Salary Range: $188,000- $301,000
• Employee may be eligible for performance bonus, short- and long-term incentive programs. Actual total compensation will be dependent upon the individual's skills, experience, and qualifications. In addition, MediaTek provides a variety of benefits including comprehensive health insurance coverage, life and disability insurance, savings plan, Company paid holidays, Vacation Time, Sick leave, Parental leave, 401K and more.
• MediaTek is an Equal Opportunity Employer that is committed to inclusion and diversity to all, regardless of age, ancestry, color, disability (mental and physical), exercising the right to family care and medical leave, gender, gender expression, gender identity, genetic information, marital status, medical condition, military or veteran status, national origin, political affiliation, race, religious creed, sex (includes pregnancy, childbirth, breastfeeding and related medical conditions), and sexual orientation.