Electrical/Optical SerDes DSP and Algorithm Engineer

MediaTek; Irvine (CA); On-site; USD 150,000 - 255,000; Full time

Benefits offered by this job

Comprehensive health insurance coverage

Life and disability insurance

Savings plan

Company-paid holidays

Vacation time

Sick leave

Parental leave

401(k)

Job summary

MediaTek in Irvine, California, is seeking a candidate to develop advanced algorithms and architecture for high-speed electrical/optical SerDes. Responsibilities include modeling in Matlab/Python/C++ and optimizing for power, performance, and area (PPA). Candidates should have a strong understanding of digital signal processing and communication theory, with a master's degree in electrical engineering or computer science. Compensation ranges from $150,000 to $255,000, along with various benefits including health insurance and a 401(k).

Qualifications

• Deep understanding of digital signal processing (DSP) and communication theory.
• Proficiency in Matlab, Python, or C++ for system modeling.
• Experience with CDR, equalization, compensation, and error coding in wireline and optical systems is a plus.
• Experience with analog circuit design or RTL design is a plus.

Responsibilities

• Develop advanced algorithms and architecture for high speed electrical / optical SerDes.
• Model algorithms in Matlab / Python / C++ for performance evaluation.
• Optimize algorithms and architecture for power, performance, and area (PPA).
• Support bit-true cycle-true modeling, design verification, and post-silicon validation.
• Collaborate with worldwide design teams.

Skills

Digital signal processing (DSP)

Communication theory

System modeling in Matlab

System modeling in Python

System modeling in C++

Team collaboration

Strong communication skills

Education

MS or higher degree in EE / CS or related field

Job description

Job Description

• Develop advanced algorithm and architecture for high speed electrical / optical SerDes.
• Model the algorithm in Matlab / Python / C++ for performance evaluation.
• Optimize algorithm and architecture for PPA.
• Support bit‑true cycle‑true modeling, design verification, and post‑silicon validation.
• Collaborate with worldwide design teams.

Main Requirements and Qualifications

• Deep understanding of digital signal processing (DSP) and communication theory.
• Proficiency in Matlab / Python / C++ for system modeling.
• Experience with CDR, equalization, compensation, cancellation, sequence detection, error coding, etc. in wireline and optical systems is a plus.
• Experience with analog circuit design or RTL design is a plus.
• Team player with strong communication skills.
• MS or higher degree in EE / CS or related field.
• Salary range: $150,000- $255,000.
• Employee may be eligible for performance bonus, short- and long-term incentive programs; actual total compensation will depend on skills, experience, and qualifications.
• MediaTek provides a variety of benefits, including comprehensive health insurance coverage, life and disability insurance, savings plan, company‑paid holidays, vacation time, sick leave, parental leave, 401(k) and more.
• MediaTek is an Equal Opportunity Employer committed to inclusion and diversity regarding age, ancestry, color, disability, family care, gender, gender expression, gender identity, genetic information, marital status, medical condition, military or veteran status, national origin, political affiliation, race, religious creed, sex (including pregnancy, childbirth, breastfeeding and related medical conditions), and sexual orientation.