Electrical Engineer II-Firmware Verification

Leonardo DRS; Danbury (CT); On-site; USD 90,000 - 130,000; Full time

Benefits offered by this job

Medical insurance

Dental insurance

Vision coverage

401(k)

Job summary

Leonardo DRS in Danbury, CT is seeking an Electrical Engineer II for firmware verification focused on FPGA and embedded systems. You will design, develop, and document verification environments and testbenches to ensure design intent and identify defects early in development.

The role requires experience with UVM, SystemVerilog, and Python-based verification, plus collaboration across teams to meet cost and schedule goals. A clearance or ability to obtain one is required.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or equivalent combination of education and experience
• 2 years of experience in digital design, FPGA development, or firmware/hardware verification; relevant internship, co-op, or academic project experience is applicable
• Foundational knowledge of digital logic design and verification concepts
• Coursework or hands-on exposure to Hardware Description Languages (VHDL, Verilog, or SystemVerilog)
• Familiarity with modern firmware/FPGA verification methodologies and tools, such as UVM (Universal Verification Methodology), SystemVerilog-based testbenches, Python-based verification frameworks (e.g., cocotb), or formal verification tools
• Basic understanding of the FPGA/ASIC development flow (simulation, synthesis, timing closure)
• Ability to work independently and collaboratively within a team environment
• Strong analytical, problem-solving, and debugging skills
• Experience with SystemVerilog Assertions (SVA) and functional/code coverage-driven verification
• Exposure to formal verification tools (e.g., Cadence JasperGold, Siemens Questa Formal, or similar)
• Familiarity with version control (Git) and continuous integration/regression frameworks for verification
• Experience with FPGA vendor toolchains (Xilinx Vivado, Intel/Altera Quartus) and HDL simulators (Questa/ModelSim, VCS, Xcelium)

Responsibilities

• Responsible for firmware and FPGA verification activities and completion of assigned tasks on time and budget
• Develop, execute, and maintain verification environments, testbenches, and test plans for digital hardware and firmware designs, documenting and reporting results
• Apply modern verification methodologies and tools (e.g., UVM, SystemVerilog, Python/cocotb, formal verification) to validate design functionality against requirements
• Develop and execute functional and code coverage models to measure verification completeness and identify gaps
• Review customer specifications and requirements, and under direction, develop verification approaches to best support them, including cost and schedule as key variables
• Develop prototypes, testbenches, and simulation models to retire key development risks
• Communicate clearly (written and oral) with other company personnel and the customer as required
• May provide technical knowledge and assistance to other engineers and support personnel on verification methodologies and tools

Skills

Firmware verification

FPGA development

SystemVerilog

UVM

Python cocotb

HDL testbenches

SVA

Verilog

Git

CI/CD

Education

Bachelor's degree in Electrical Engineering

Tools

Vivado

Quartus

Questa

ModelSim

VCS

Xcelium

JasperGold

Job description

Electrical Engineer II-Firmware Verification

Location: Danbury, CT, US, 06810-8147

Job ID:113650

The Leonardo DRS Naval Power Systems business is a trusted provider of innovative naval gas and hybrid power systems, control technology and support solutions for the U.S. Navy and navies around the world.

Job Summary

The Electrical Engineer II is responsible for a specific technical activity and completion of assigned tasks on time and budget, with a primary focus on firmware and FPGA verification supporting Leonardo DRS programs. Design, develop, execute, and document verification environments, test plans, and testbenches to validate digital hardware and embedded firmware designs prior to integration. Apply modern verification methodologies and tools — including UVM (Universal Verification Methodology), SystemVerilog, to ensure design intent is met and defects are identified early in the development lifecycle. Use computer-aided engineering and verification software in the performance of assignments.

Job Responsibilities

• Responsible for firmware and FPGA verification activities and completion of assigned tasks on time and budget
• Develop, execute, and maintain verification environments, testbenches, and test plans for digital hardware and firmware designs, documenting and reporting results
• Apply modern verification methodologies and tools (e.g., UVM, SystemVerilog, Python/cocotb, formal verification) to validate design functionality against requirements
• Develop and execute functional and code coverage models to measure verification completeness and identify gaps
• Review customer specifications and requirements, and under direction, develop verification approaches to best support them, including cost and schedule as key variables
• Develop prototypes, testbenches, and simulation models to retire key development risks
• Communicate clearly (written and oral) with other company personnel and the customer as required
• May provide technical knowledge and assistance to other engineers and support personnel on verification methodologies and tools

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or equivalent combination of education and experience
• 2 years of experience in digital design, FPGA development, or firmware/hardware verification; relevant internship, co-op, or academic project experience is applicable
• Foundational knowledge of digital logic design and verification concepts
• Coursework or hands-on exposure to Hardware Description Languages (VHDL, Verilog, or SystemVerilog)
• Familiarity with modern firmware/FPGA verification methodologies and tools, such as UVM (Universal Verification Methodology), SystemVerilog-based testbenches, Python-based verification frameworks (e.g., cocotb), or formal verification tools
• Basic understanding of the FPGA/ASIC development flow (simulation, synthesis, timing closure)
• Ability to work independently and collaboratively within a team environment
• Strong analytical, problem-solving, and debugging skills
• Experience with SystemVerilog Assertions (SVA) and functional/code coverage-driven verification
• Exposure to formal verification tools (e.g., Cadence JasperGold, Siemens Questa Formal, or similar)
• Familiarity with version control (Git) and continuous integration/regression frameworks for verification
• Experience with FPGA vendor toolchains (Xilinx Vivado, Intel/Altera Quartus) and HDL simulators (Questa/ModelSim, VCS, Xcelium)

U.S. Citizenship required. This position requires an active DOD security clearance or the ability to obtain such clearance within a reasonable time after commencement of employment.

Taking care of our people is a top priority at Leonardo DRS. We are proud to offer competitive salaries and comprehensive benefits, including medical, dental, and vision coverage, a company contribution to a health savings account, telemedicine, life and disability insurance, legal insurance, and a 401(k) savings plan. We champion wellness programs that focus on physical, emotional, and financial well-being. We develop our talent by offering programs and activities to support career-growth, professional development, and skill enhancement. And we understand there is more to life than work, and the importance of offering flexible work schedules with our 9/80 program, competitive vacation, health/emergency leave, paid parental leave, and community service hours.
*Some employees are eligible for limited benefits only

Leonardo DRS, Inc. and its subsidiaries provide equal opportunities to all employees and applicants for employment and prohibit discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, protected veteran status, or any other characteristic protected by federal, state, or local laws.

#NPS

Our Vision. To be the leading mid-tier defense technology company in the U.S.

Our Values. The Leonardo DRS culture is defined by our Core Values and Principles:

• Integrity
• Agility
• Excellence
• Customer Focus
• Community & Respect
• Innovation

We strive to uphold them in all aspects of our business practices to inspire our employees and provide outstanding support for our customers.