EDA and CAD Lead Engineer / Manager

AttoTude inc.; Menlo Park, Bethlehem (CA, Northampton County); Remote; USD 140,000 - 200,000; Full time

Benefits offered by this job

Paid time off

Job summary

AttoTude inc. seeks an experienced EDA/CAD lead engineer to drive layout for cutting-edge mixed-signal ICs from concept to production. This hands-on, technical role demands strong Cadence expertise, scripting skills, and a track record of successful tapeouts.

The position offers remote work with occasional Bay Area travel (<20%). You will collaborate with cross-functional teams to ensure timely tape-outs and design quality in a fast-paced environment.

Qualifications

• Formal Cadence digital layout training or certification.
• Bachelor’s degree in electrical engineering, computer science or a related field.

Responsibilities

• Pad Ring creation and layout supervision.
• Collaborate with analog/mixed-signal designers for high-performance integration.

Skills

CMOS IC design

Cadence tools

Tapeout experience

Scripting (Tcl, Python)

Cross-disciplinary teamwork

Education

Cadence digital layout training

Bachelor's degree in EE/CS or related field

Tools

Cadence

Virtuoso

Calibre

Voltus

Job description

We are seeking an experienced EDA/CAD lead engineer to join our growing team. In this role, you will be part of the experience design and layout team to develop cutting-edge mixed-signal ICs. You will be involved in the technical aspects of the ASIC design and development, from concept through to production. This is a hands-on technical position that requires in-depth technical expertise, and the ability to work in a team of highly experienced engineers to accomplish the goals.

Key Responsibilities:

• Pad Ring creation
• Work with analog/mixed-signal designers for high-performance layout integration
• Work with digital designers for DFT/ATPG/Scan logic integration
• Perform LVS/DRC checks and fix issues
• Integration of Digital/RF/mmWave blocks into IC Top Level
• Collaborate with cross-functional teams to ensure timely project execution and design tape-outs
• Stay updated with the latest trends and technologies in wideband high speed IC design and apply them to improve project outcomes
• Occasional travel to the Bay Area (<20%) for remote position

Qualifications:

• 5+ years of hands-on experience in CMOS (bulk and advanced FinFET) IC implementation in multiple process technologies
• Strong experience with Cadence (and various EDA) tools is required (Virtuoso, Calibre, Voltus)
• Experience in multiple dedicated tapeout support is required
• Scripting language experience in Tcl, Python, Perl, Makefile, and shell scripts are required

Education:

• Formal Cadence digital layout training or certification is required
• Bachelor’s degree in electrical engineering, computer science or a related field is preferred

Preferred Skills:

• Experience with CMOS, and/or SiGe Process Development Kits
• Experience working on a multidisciplinary team with RF/Mixed Signal, Hardware, Firmware, and Software engineers
• Strong communication and teamwork skills
• Experience working in fast-paced environments with a strong track record of delivering high-quality designs on time.
• Paid time off

Annual Salary Range

$140,000 - $200,000 USD