CAD Engineer

TetraMem - Accelerate The World; San Jose (CA); On-site; USD 110,000 - 250,000; Full time

Job summary

TetraMem seeks a senior CAD engineer to lead in-house CAD tool development for analog and digital IC design, layout, and SoC sign-off in a fast-paced startup environment.

You will automate design and verification flows using Tcl, Skill, and Python, collaborate with design/verification teams and EDA vendors to optimize licenses, and mentor junior engineers while pushing process improvements.

Qualifications

• Degree in Electrical or Computer Engineering with CAD design flow experience.
• 10+ years CAD engineering experience, with at least 2 years in the relevant design flow.
• Strong knowledge of analog design, custom layout and physical verification flows.
• Familiar with common EDA environment tools (e.g., Synopsys, Cadence, Siemens), licensing, environment setup, and automation APIs.

Responsibilities

• Development of in-house CAD tools for analog design, analog layout, database management, digital frontend and backend, SoC sign-off.
• Automation in design and verification flow using languages such as tcl, skill, or python.
• Collaborate with design engineer, verification engineer, IT, and EDA vendor to optimize EDA license usage.
• Drive innovation by researching and implementing advanced CAD methodologies that either increase productivity or reduce EDA cost.
• Mentor and provide technical guidance to junior engineers, fostering a culture of continuous learning and professional development.
• Participate in design reviews, provide constructive feedback, and contribute to the improvement of design processes and standards.

Skills

TCL

Python

Automation scripting

Education

Electrical Engineering or Computer Engineering degree

Tools

Synopsys

Cadence

Siemens

Job description

• Development of in-house CAD tools for analog design, analog layout, database management, digital frontend and backend, SoC sign-off
• Automation in design and verification flow using languages such as tcl, skill, or python
• Collaborate with design engineer, verification engineer, IT, and EDA vendor to optimize EDA license usage
• Drive innovation by researching and implementing advanced CAD methodologies that either increase productivity or reduce EDA cost
• Mentor and provide technical guidance to junior engineers, fostering a culture of continuous learning and professional development.
• Participate in design reviews, provide constructive feedback, and contribute to the improvement of design processes and standards.

Responsibilities

• Development of in-house CAD tools for analog design, analog layout, database management, digital frontend and backend, SoC sign-off
• Automation in design and verification flow using languages such as tcl, skill, or python
• Collaborate with design engineer, verification engineer, IT, and EDA vendor to optimize EDA license usage
• Drive innovation by researching and implementing advanced CAD methodologies that either increase productivity or reduce EDA cost
• Mentor and provide technical guidance to junior engineers, fostering a culture of continuous learning and professional development.
• Participate in design reviews, provide constructive feedback, and contribute to the improvement of design processes and standards.

Requirements

• Degree in Electrical Engineering or Computer Engineering, with experience in analog or digital IC design flow and CAD methodology.
• 10+ years of experience in CAD engineering, with at least 2 years of experience in
• Strong knowledge of analog design, custom layout and physical verification flows
• Familiar with common EDA environment tools (e.g., Synopsys, Cadence, Siemens etc.), include licensing, environment setup, automation API, and have working knowledge on tool usage
• Experience with at least one of SKILL or TCL
• Proficient with UNIX based operating system, file management, disk management and security
• Ability to automate design methodologies and create productivity scripts with design engineers
• Ability to work in a startup environment and to work both independently and as a team player

The Following Skillsets Will Be Considered a Strong Asset

• Experience with circuit or layout design in Cadence environment
• Experience with ASIC design in Synopsys environment

Salary Range:

$110,000 - $250,000 / year